2021-03-02 14:45:47 +03:00
|
|
|
#include "bq25896.h"
|
|
|
|
#include "bq25896_reg.h"
|
2021-02-18 15:49:32 +03:00
|
|
|
|
2021-08-08 21:03:25 +03:00
|
|
|
#include <furi-hal-i2c.h>
|
2021-03-02 14:45:47 +03:00
|
|
|
#include <stddef.h>
|
2020-11-11 09:31:35 +03:00
|
|
|
|
|
|
|
uint8_t bit_reverse(uint8_t b) {
|
2021-03-10 16:23:54 +03:00
|
|
|
b = (b & 0xF0) >> 4 | (b & 0x0F) << 4;
|
|
|
|
b = (b & 0xCC) >> 2 | (b & 0x33) << 2;
|
|
|
|
b = (b & 0xAA) >> 1 | (b & 0x55) << 1;
|
|
|
|
return b;
|
2020-11-11 09:31:35 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
bool bq25896_read(uint8_t address, uint8_t* data, size_t size) {
|
2021-02-18 15:49:32 +03:00
|
|
|
bool ret;
|
2021-08-08 21:03:25 +03:00
|
|
|
with_furi_hal_i2c(
|
2021-03-10 16:23:54 +03:00
|
|
|
bool, &ret, () {
|
2021-08-08 21:03:25 +03:00
|
|
|
return furi_hal_i2c_trx(
|
2021-03-10 16:23:54 +03:00
|
|
|
POWER_I2C, BQ25896_ADDRESS, &address, 1, data, size, BQ25896_I2C_TIMEOUT);
|
|
|
|
});
|
2021-02-18 15:49:32 +03:00
|
|
|
return ret;
|
2020-11-11 09:31:35 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
bool bq25896_read_reg(uint8_t address, uint8_t* data) {
|
|
|
|
bq25896_read(address, data, 1);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool bq25896_write_reg(uint8_t address, uint8_t* data) {
|
2021-03-10 16:23:54 +03:00
|
|
|
uint8_t buffer[2] = {address, *data};
|
2021-02-18 15:49:32 +03:00
|
|
|
bool ret;
|
2021-08-08 21:03:25 +03:00
|
|
|
with_furi_hal_i2c(
|
2021-03-10 16:23:54 +03:00
|
|
|
bool, &ret, () {
|
2021-08-08 21:03:25 +03:00
|
|
|
return furi_hal_i2c_tx(POWER_I2C, BQ25896_ADDRESS, buffer, 2, BQ25896_I2C_TIMEOUT);
|
2021-03-10 16:23:54 +03:00
|
|
|
});
|
2021-02-18 15:49:32 +03:00
|
|
|
return ret;
|
2020-11-11 09:31:35 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
typedef struct {
|
|
|
|
REG00 r00;
|
|
|
|
REG01 r01;
|
|
|
|
REG02 r02;
|
|
|
|
REG03 r03;
|
|
|
|
REG04 r04;
|
|
|
|
REG05 r05;
|
|
|
|
REG06 r06;
|
|
|
|
REG07 r07;
|
|
|
|
REG08 r08;
|
|
|
|
REG09 r09;
|
|
|
|
REG0A r0A;
|
|
|
|
REG0B r0B;
|
|
|
|
REG0C r0C;
|
|
|
|
REG0D r0D;
|
|
|
|
REG0E r0E;
|
|
|
|
REG0F r0F;
|
|
|
|
REG10 r10;
|
|
|
|
REG11 r11;
|
|
|
|
REG12 r12;
|
|
|
|
REG13 r13;
|
|
|
|
REG14 r14;
|
|
|
|
} bq25896_regs_t;
|
|
|
|
|
|
|
|
static bq25896_regs_t bq25896_regs;
|
|
|
|
|
|
|
|
void bq25896_init() {
|
2020-12-04 20:30:50 +03:00
|
|
|
bq25896_regs.r14.REG_RST = 1;
|
|
|
|
bq25896_write_reg(0x14, (uint8_t*)&bq25896_regs.r14);
|
|
|
|
|
|
|
|
// Readout all registers
|
2020-11-11 09:31:35 +03:00
|
|
|
bq25896_read(0x00, (uint8_t*)&bq25896_regs, sizeof(bq25896_regs));
|
|
|
|
|
2020-12-04 20:30:50 +03:00
|
|
|
// Poll ADC forever
|
|
|
|
bq25896_regs.r02.CONV_START = 1;
|
|
|
|
bq25896_regs.r02.CONV_RATE = 1;
|
|
|
|
bq25896_write_reg(0x02, (uint8_t*)&bq25896_regs.r02);
|
2020-11-11 09:31:35 +03:00
|
|
|
|
2020-12-04 20:30:50 +03:00
|
|
|
bq25896_regs.r07.WATCHDOG = WatchdogDisable;
|
|
|
|
bq25896_write_reg(0x07, (uint8_t*)&bq25896_regs.r07);
|
2020-11-11 09:31:35 +03:00
|
|
|
|
|
|
|
bq25896_read(0x00, (uint8_t*)&bq25896_regs, sizeof(bq25896_regs));
|
|
|
|
}
|
|
|
|
|
|
|
|
void bq25896_poweroff() {
|
2021-03-10 16:23:54 +03:00
|
|
|
bq25896_regs.r09.BATFET_DIS = 1;
|
2020-11-11 09:31:35 +03:00
|
|
|
bq25896_write_reg(0x09, (uint8_t*)&bq25896_regs.r09);
|
|
|
|
}
|
|
|
|
|
|
|
|
bool bq25896_is_charging() {
|
2020-12-04 20:30:50 +03:00
|
|
|
bq25896_read(0x00, (uint8_t*)&bq25896_regs, sizeof(bq25896_regs));
|
2020-11-11 09:31:35 +03:00
|
|
|
bq25896_read_reg(0x0B, (uint8_t*)&bq25896_regs.r0B);
|
|
|
|
return bq25896_regs.r0B.CHRG_STAT != ChrgStatNo;
|
|
|
|
}
|
|
|
|
|
|
|
|
void bq25896_enable_otg() {
|
|
|
|
bq25896_regs.r03.OTG_CONFIG = 1;
|
2020-12-02 13:47:13 +03:00
|
|
|
bq25896_write_reg(0x03, (uint8_t*)&bq25896_regs.r03);
|
2020-11-11 09:31:35 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
void bq25896_disable_otg() {
|
|
|
|
bq25896_regs.r03.OTG_CONFIG = 0;
|
2020-12-02 13:47:13 +03:00
|
|
|
bq25896_write_reg(0x03, (uint8_t*)&bq25896_regs.r03);
|
|
|
|
}
|
|
|
|
|
|
|
|
uint16_t bq25896_get_vbus_voltage() {
|
|
|
|
bq25896_read_reg(0x11, (uint8_t*)&bq25896_regs.r11);
|
2021-03-10 16:23:54 +03:00
|
|
|
if(bq25896_regs.r11.VBUS_GD) {
|
2020-12-02 13:47:13 +03:00
|
|
|
return (uint16_t)bq25896_regs.r11.VBUSV * 100 + 2600;
|
|
|
|
} else {
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
uint16_t bq25896_get_vsys_voltage() {
|
|
|
|
bq25896_read_reg(0x0F, (uint8_t*)&bq25896_regs.r0F);
|
|
|
|
return (uint16_t)bq25896_regs.r0F.SYSV * 20 + 2304;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint16_t bq25896_get_vbat_voltage() {
|
|
|
|
bq25896_read_reg(0x0E, (uint8_t*)&bq25896_regs.r0E);
|
|
|
|
return (uint16_t)bq25896_regs.r0E.BATV * 20 + 2304;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint16_t bq25896_get_vbat_current() {
|
|
|
|
bq25896_read_reg(0x12, (uint8_t*)&bq25896_regs.r12);
|
|
|
|
return (uint16_t)bq25896_regs.r12.ICHGR * 50;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t bq25896_get_ntc_mpct() {
|
|
|
|
bq25896_read_reg(0x10, (uint8_t*)&bq25896_regs.r10);
|
2021-03-10 16:23:54 +03:00
|
|
|
return (uint32_t)bq25896_regs.r10.TSPCT * 465 + 21000;
|
2020-11-11 09:31:35 +03:00
|
|
|
}
|