2021-11-30 15:09:43 +03:00
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#pragma once
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2022-01-05 19:10:18 +03:00
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#include <furi_hal_spi_config.h>
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2021-11-30 15:09:43 +03:00
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#include <stdbool.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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2022-04-13 23:50:25 +03:00
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/** Early initialize SPI HAL */
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2023-02-07 19:33:05 +03:00
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void furi_hal_spi_config_init_early();
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2022-04-13 23:50:25 +03:00
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/** Early deinitialize SPI HAL */
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2023-02-07 19:33:05 +03:00
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void furi_hal_spi_config_deinit_early();
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2022-04-13 23:50:25 +03:00
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2021-11-30 15:09:43 +03:00
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/** Initialize SPI HAL */
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2023-02-07 19:33:05 +03:00
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void furi_hal_spi_config_init();
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2021-11-30 15:09:43 +03:00
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2023-02-08 07:41:22 +03:00
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/** Initialize SPI DMA HAL */
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void furi_hal_spi_dma_init();
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2021-11-30 15:09:43 +03:00
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/** Initialize SPI Bus
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*
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* @param handle pointer to FuriHalSpiBus instance
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*/
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void furi_hal_spi_bus_init(FuriHalSpiBus* bus);
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/** Deinitialize SPI Bus
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*
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* @param handle pointer to FuriHalSpiBus instance
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*/
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void furi_hal_spi_bus_deinit(FuriHalSpiBus* bus);
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/** Initialize SPI Bus Handle
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*
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* @param handle pointer to FuriHalSpiBusHandle instance
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*/
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void furi_hal_spi_bus_handle_init(FuriHalSpiBusHandle* handle);
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/** Deinitialize SPI Bus Handle
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*
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* @param handle pointer to FuriHalSpiBusHandle instance
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*/
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void furi_hal_spi_bus_handle_deinit(FuriHalSpiBusHandle* handle);
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/** Acquire SPI bus
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*
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* @warning blocking, calls `furi_crash` on programming error, CS transition is up to handler event routine
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*
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* @param handle pointer to FuriHalSpiBusHandle instance
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*/
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void furi_hal_spi_acquire(FuriHalSpiBusHandle* handle);
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/** Release SPI bus
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*
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* @warning calls `furi_crash` on programming error, CS transition is up to handler event routine
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*
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* @param handle pointer to FuriHalSpiBusHandle instance
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*/
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void furi_hal_spi_release(FuriHalSpiBusHandle* handle);
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/** SPI Receive
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*
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* @param handle pointer to FuriHalSpiBusHandle instance
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* @param buffer receive buffer
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* @param size transaction size (buffer size)
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* @param timeout operation timeout in ms
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*
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* @return true on sucess
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*/
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bool furi_hal_spi_bus_rx(
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FuriHalSpiBusHandle* handle,
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uint8_t* buffer,
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size_t size,
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uint32_t timeout);
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/** SPI Transmit
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*
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* @param handle pointer to FuriHalSpiBusHandle instance
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* @param buffer transmit buffer
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* @param size transaction size (buffer size)
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* @param timeout operation timeout in ms
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*
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* @return true on success
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*/
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bool furi_hal_spi_bus_tx(
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FuriHalSpiBusHandle* handle,
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uint8_t* buffer,
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size_t size,
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uint32_t timeout);
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/** SPI Transmit and Receive
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*
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* @param handle pointer to FuriHalSpiBusHandle instance
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* @param tx_buffer pointer to tx buffer
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* @param rx_buffer pointer to rx buffer
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* @param size transaction size (buffer size)
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* @param timeout operation timeout in ms
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*
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* @return true on success
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*/
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bool furi_hal_spi_bus_trx(
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FuriHalSpiBusHandle* handle,
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uint8_t* tx_buffer,
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uint8_t* rx_buffer,
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size_t size,
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uint32_t timeout);
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2023-02-08 07:41:22 +03:00
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/** SPI Transmit and Receive with DMA
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*
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* @param handle pointer to FuriHalSpiBusHandle instance
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* @param tx_buffer pointer to tx buffer
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* @param rx_buffer pointer to rx buffer
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* @param size transaction size (buffer size)
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* @param timeout_ms operation timeout in ms
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*
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* @return true on success
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*/
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bool furi_hal_spi_bus_trx_dma(
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FuriHalSpiBusHandle* handle,
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uint8_t* tx_buffer,
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uint8_t* rx_buffer,
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size_t size,
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uint32_t timeout_ms);
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2021-11-30 15:09:43 +03:00
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#ifdef __cplusplus
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}
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2022-04-13 23:50:25 +03:00
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#endif
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