2021-05-18 13:51:00 +03:00
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#include "api-hal-irda.h"
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2021-07-16 19:43:54 +03:00
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#include <cmsis_os2.h>
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#include <api-hal-interrupt.h>
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#include <api-hal-resources.h>
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2021-06-30 00:19:20 +03:00
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2021-07-16 19:43:54 +03:00
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#include <stdint.h>
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2021-05-18 13:51:00 +03:00
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#include <stm32wbxx_ll_tim.h>
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#include <stm32wbxx_ll_gpio.h>
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2021-06-30 00:19:20 +03:00
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2021-05-18 13:51:00 +03:00
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#include <stdio.h>
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#include <furi.h>
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2021-07-16 19:43:54 +03:00
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#include <main.h>
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#include <api-hal-pwm.h>
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2021-05-18 13:51:00 +03:00
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static struct{
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2021-07-16 19:43:54 +03:00
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ApiHalIrdaCaptureCallback capture_callback;
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void *capture_context;
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ApiHalIrdaTimeoutCallback timeout_callback;
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void *timeout_context;
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2021-05-18 13:51:00 +03:00
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} timer_irda;
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2021-06-30 00:19:20 +03:00
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typedef enum{
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TimerIRQSourceCCI1,
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TimerIRQSourceCCI2,
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} TimerIRQSource;
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2021-05-18 13:51:00 +03:00
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2021-07-16 19:43:54 +03:00
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static void api_hal_irda_handle_timeout(void) {
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/* Timers CNT register starts to counting from 0 to ARR, but it is
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* reseted when Channel 1 catches interrupt. It is not reseted by
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* channel 2, though, so we have to distract it's values (see TimerIRQSourceCCI1 ISR).
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* This can cause false timeout: when time is over, but we started
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* receiving new signal few microseconds ago, because CNT register
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* is reseted once per period, not per sample. */
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if (LL_GPIO_IsInputPinSet(gpio_irda_rx.port, gpio_irda_rx.pin) == 0)
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return;
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if (timer_irda.timeout_callback)
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timer_irda.timeout_callback(timer_irda.timeout_context);
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}
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/* High pin level is a Space state of IRDA signal. Invert level for further processing. */
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static void api_hal_irda_handle_capture(TimerIRQSource source) {
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2021-05-18 13:51:00 +03:00
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uint32_t duration = 0;
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bool level = 0;
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switch (source) {
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case TimerIRQSourceCCI1:
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duration = LL_TIM_IC_GetCaptureCH1(TIM2) - LL_TIM_IC_GetCaptureCH2(TIM2);
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level = 1;
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break;
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case TimerIRQSourceCCI2:
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duration = LL_TIM_IC_GetCaptureCH2(TIM2);
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level = 0;
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break;
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default:
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furi_check(0);
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}
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2021-07-16 19:43:54 +03:00
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if (timer_irda.capture_callback)
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timer_irda.capture_callback(timer_irda.capture_context, level, duration);
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}
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2021-06-30 00:19:20 +03:00
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static void api_hal_irda_isr() {
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if(LL_TIM_IsActiveFlag_CC3(TIM2)) {
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LL_TIM_ClearFlag_CC3(TIM2);
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api_hal_irda_handle_timeout();
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}
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if(LL_TIM_IsActiveFlag_CC1(TIM2)) {
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LL_TIM_ClearFlag_CC1(TIM2);
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if(READ_BIT(TIM2->CCMR1, TIM_CCMR1_CC1S)) {
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// input capture
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api_hal_irda_handle_capture(TimerIRQSourceCCI1);
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}
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}
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if(LL_TIM_IsActiveFlag_CC2(TIM2)) {
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LL_TIM_ClearFlag_CC2(TIM2);
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if(READ_BIT(TIM2->CCMR1, TIM_CCMR1_CC2S)) {
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// input capture
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api_hal_irda_handle_capture(TimerIRQSourceCCI2);
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}
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}
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}
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void api_hal_irda_rx_irq_init(void) {
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LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2);
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LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);
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2021-07-16 19:43:54 +03:00
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hal_gpio_init_ex(&gpio_irda_rx, GpioModeAltFunctionPushPull, GpioPullNo, GpioSpeedLow, GpioAltFn1TIM2);
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LL_TIM_InitTypeDef TIM_InitStruct = {0};
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TIM_InitStruct.Prescaler = 64 - 1;
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TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
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TIM_InitStruct.Autoreload = 0x7FFFFFFE;
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TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
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LL_TIM_Init(TIM2, &TIM_InitStruct);
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LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL);
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LL_TIM_DisableARRPreload(TIM2);
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LL_TIM_SetTriggerInput(TIM2, LL_TIM_TS_TI1FP1);
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LL_TIM_SetSlaveMode(TIM2, LL_TIM_SLAVEMODE_RESET);
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LL_TIM_CC_DisableChannel(TIM2, LL_TIM_CHANNEL_CH2);
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LL_TIM_IC_SetFilter(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_IC_FILTER_FDIV1);
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LL_TIM_IC_SetPolarity(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_IC_POLARITY_FALLING);
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LL_TIM_DisableIT_TRIG(TIM2);
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LL_TIM_DisableDMAReq_TRIG(TIM2);
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LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET);
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LL_TIM_EnableMasterSlaveMode(TIM2);
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LL_TIM_IC_SetActiveInput(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_ACTIVEINPUT_DIRECTTI);
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LL_TIM_IC_SetPrescaler(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_ICPSC_DIV1);
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LL_TIM_IC_SetFilter(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_IC_FILTER_FDIV1);
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LL_TIM_IC_SetPolarity(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_IC_POLARITY_RISING);
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LL_TIM_IC_SetActiveInput(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_ACTIVEINPUT_INDIRECTTI);
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LL_TIM_IC_SetPrescaler(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_ICPSC_DIV1);
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LL_TIM_EnableIT_CC1(TIM2);
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LL_TIM_EnableIT_CC2(TIM2);
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LL_TIM_CC_EnableChannel(TIM2, LL_TIM_CHANNEL_CH1);
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LL_TIM_CC_EnableChannel(TIM2, LL_TIM_CHANNEL_CH2);
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2021-07-16 19:43:54 +03:00
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api_hal_interrupt_set_timer_isr(TIM2, api_hal_irda_isr);
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2021-05-18 13:51:00 +03:00
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LL_TIM_SetCounter(TIM2, 0);
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LL_TIM_EnableCounter(TIM2);
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}
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void api_hal_irda_rx_irq_deinit(void) {
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LL_TIM_DeInit(TIM2);
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api_hal_interrupt_set_timer_isr(TIM2, NULL);
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}
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void api_hal_irda_rx_timeout_irq_init(uint32_t timeout_ms) {
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LL_TIM_OC_SetCompareCH3(TIM2, timeout_ms * 1000);
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LL_TIM_OC_SetMode(TIM2, LL_TIM_CHANNEL_CH3, LL_TIM_OCMODE_ACTIVE);
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LL_TIM_CC_EnableChannel(TIM2, LL_TIM_CHANNEL_CH3);
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LL_TIM_EnableIT_CC3(TIM2);
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}
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2021-06-09 16:04:49 +03:00
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bool api_hal_irda_rx_irq_is_busy(void) {
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return (LL_TIM_IsEnabledIT_CC1(TIM2) || LL_TIM_IsEnabledIT_CC2(TIM2));
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}
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2021-07-16 19:43:54 +03:00
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void api_hal_irda_rx_irq_set_callback(ApiHalIrdaCaptureCallback callback, void *ctx) {
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timer_irda.capture_callback = callback;
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timer_irda.capture_context = ctx;
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}
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void api_hal_irda_rx_timeout_irq_set_callback(ApiHalIrdaTimeoutCallback callback, void *ctx) {
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timer_irda.timeout_callback = callback;
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timer_irda.timeout_context = ctx;
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}
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void api_hal_irda_pwm_set(float value, float freq) {
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hal_pwmn_set(value, freq, &IRDA_TX_TIM, IRDA_TX_CH);
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}
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void api_hal_irda_pwm_stop() {
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hal_pwmn_stop(&IRDA_TX_TIM, IRDA_TX_CH);
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}
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