SubGHz HAL Fixes

This commit is contained in:
MX 2023-02-12 02:41:11 +03:00
parent 1831902fbd
commit 27012b6be7
No known key found for this signature in database
GPG Key ID: 7CCC66B7DBDD1C83

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@ -44,13 +44,15 @@ volatile FuriHalSubGhz furi_hal_subghz = {
bool furi_hal_subghz_set_radio_type(SubGhzRadioType state) {
furi_hal_subghz.radio_type = state;
furi_hal_spi_bus_handle_deinit(furi_hal_subghz.spi_bus_handle);
if(state) {
furi_hal_subghz.spi_bus_handle = &furi_hal_spi_bus_handle_subghz_ext;
furi_hal_subghz.cc1101_g0_pin = &gpio_cc1101_g0_ext;
} else {
if(furi_hal_subghz.radio_type == SubGhzRadioInternal) {
furi_hal_subghz.spi_bus_handle = &furi_hal_spi_bus_handle_subghz;
furi_hal_subghz.cc1101_g0_pin = &gpio_cc1101_g0;
} else {
furi_hal_subghz.spi_bus_handle = &furi_hal_spi_bus_handle_subghz_ext;
furi_hal_subghz.cc1101_g0_pin = &gpio_cc1101_g0_ext;
}
furi_hal_spi_bus_handle_init(furi_hal_subghz.spi_bus_handle);
furi_hal_subghz_init_check();
return true;
@ -121,37 +123,26 @@ bool furi_hal_subghz_init_check(void) {
// Prepare GD0 for power on self test
furi_hal_gpio_init(furi_hal_subghz.cc1101_g0_pin, GpioModeInput, GpioPullNo, GpioSpeedLow);
if(furi_hal_subghz.radio_type == SubGhzRadioExternal) {
// GD0 low
cc1101_write_reg(furi_hal_subghz.spi_bus_handle, CC1101_IOCFG0, CC1101IocfgHW);
uint32_t test_start_time = furi_get_tick();
while(furi_hal_gpio_read(furi_hal_subghz.cc1101_g0_pin) != false && result) {
if(furi_get_tick() - test_start_time > INIT_TIMEOUT) {
result = false;
}
}
// GD0 high
cc1101_write_reg(
furi_hal_subghz.spi_bus_handle, CC1101_IOCFG0, CC1101IocfgHW | CC1101_IOCFG_INV);
test_start_time = furi_get_tick();
while(furi_hal_gpio_read(furi_hal_subghz.cc1101_g0_pin) != true && result) {
if(furi_get_tick() - test_start_time > INIT_TIMEOUT) {
result = false;
}
// GD0 low
cc1101_write_reg(furi_hal_subghz.spi_bus_handle, CC1101_IOCFG0, CC1101IocfgHW);
uint32_t test_start_time = furi_get_tick();
while(furi_hal_gpio_read(furi_hal_subghz.cc1101_g0_pin) != false && result) {
if(furi_get_tick() - test_start_time > INIT_TIMEOUT) {
result = false;
}
} else {
// GD0 low
cc1101_write_reg(furi_hal_subghz.spi_bus_handle, CC1101_IOCFG0, CC1101IocfgHW);
while(furi_hal_gpio_read(&gpio_cc1101_g0) != false)
;
// GD0 high
cc1101_write_reg(
furi_hal_subghz.spi_bus_handle, CC1101_IOCFG0, CC1101IocfgHW | CC1101_IOCFG_INV);
while(furi_hal_gpio_read(&gpio_cc1101_g0) != true)
;
}
// GD0 high
cc1101_write_reg(
furi_hal_subghz.spi_bus_handle, CC1101_IOCFG0, CC1101IocfgHW | CC1101_IOCFG_INV);
test_start_time = furi_get_tick();
while(furi_hal_gpio_read(furi_hal_subghz.cc1101_g0_pin) != true && result) {
if(furi_get_tick() - test_start_time > INIT_TIMEOUT) {
result = false;
}
}
// Reset GD0 to floating state
cc1101_write_reg(furi_hal_subghz.spi_bus_handle, CC1101_IOCFG0, CC1101IocfgHighImpedance);
furi_hal_gpio_init(furi_hal_subghz.cc1101_g0_pin, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
@ -514,56 +505,55 @@ volatile uint32_t furi_hal_subghz_capture_delta_duration = 0;
volatile FuriHalSubGhzCaptureCallback furi_hal_subghz_capture_callback = NULL;
volatile void* furi_hal_subghz_capture_callback_context = NULL;
static void furi_hal_subghz_capture_ISR() {
if(furi_hal_subghz.radio_type == SubGhzRadioExternal) {
if(!furi_hal_gpio_read(furi_hal_subghz.cc1101_g0_pin)) {
if(furi_hal_subghz_capture_callback) {
if(furi_hal_subghz.async_mirror_pin != NULL)
furi_hal_gpio_write(furi_hal_subghz.async_mirror_pin, false);
static void furi_hal_subghz_capture_int_ISR() {
// Channel 1
if(LL_TIM_IsActiveFlag_CC1(TIM2)) {
LL_TIM_ClearFlag_CC1(TIM2);
furi_hal_subghz_capture_delta_duration = LL_TIM_IC_GetCaptureCH1(TIM2);
if(furi_hal_subghz_capture_callback) {
if(furi_hal_subghz.async_mirror_pin != NULL)
furi_hal_gpio_write(furi_hal_subghz.async_mirror_pin, false);
furi_hal_subghz_capture_callback(
true, TIM2->CNT, (void*)furi_hal_subghz_capture_callback_context);
}
} else {
if(furi_hal_subghz_capture_callback) {
if(furi_hal_subghz.async_mirror_pin != NULL)
furi_hal_gpio_write(furi_hal_subghz.async_mirror_pin, true);
furi_hal_subghz_capture_callback(
false, TIM2->CNT, (void*)furi_hal_subghz_capture_callback_context);
}
}
//Forced correction for improved accuracy
TIM2->CNT = 7;
} else {
// Channel 1
if(LL_TIM_IsActiveFlag_CC1(TIM2)) {
LL_TIM_ClearFlag_CC1(TIM2);
furi_hal_subghz_capture_delta_duration = LL_TIM_IC_GetCaptureCH1(TIM2);
if(furi_hal_subghz_capture_callback) {
if(furi_hal_subghz.async_mirror_pin != NULL)
furi_hal_gpio_write(furi_hal_subghz.async_mirror_pin, false);
furi_hal_subghz_capture_callback(
true,
furi_hal_subghz_capture_delta_duration,
(void*)furi_hal_subghz_capture_callback_context);
}
}
// Channel 2
if(LL_TIM_IsActiveFlag_CC2(TIM2)) {
LL_TIM_ClearFlag_CC2(TIM2);
if(furi_hal_subghz_capture_callback) {
if(furi_hal_subghz.async_mirror_pin != NULL)
furi_hal_gpio_write(furi_hal_subghz.async_mirror_pin, true);
furi_hal_subghz_capture_callback(
false,
LL_TIM_IC_GetCaptureCH2(TIM2) - furi_hal_subghz_capture_delta_duration,
(void*)furi_hal_subghz_capture_callback_context);
}
furi_hal_subghz_capture_callback(
true,
furi_hal_subghz_capture_delta_duration,
(void*)furi_hal_subghz_capture_callback_context);
}
}
// Channel 2
if(LL_TIM_IsActiveFlag_CC2(TIM2)) {
LL_TIM_ClearFlag_CC2(TIM2);
if(furi_hal_subghz_capture_callback) {
if(furi_hal_subghz.async_mirror_pin != NULL)
furi_hal_gpio_write(furi_hal_subghz.async_mirror_pin, true);
furi_hal_subghz_capture_callback(
false,
LL_TIM_IC_GetCaptureCH2(TIM2) - furi_hal_subghz_capture_delta_duration,
(void*)furi_hal_subghz_capture_callback_context);
}
}
}
static void furi_hal_subghz_capture_ext_ISR() {
if(!furi_hal_gpio_read(furi_hal_subghz.cc1101_g0_pin)) {
if(furi_hal_subghz_capture_callback) {
if(furi_hal_subghz.async_mirror_pin != NULL)
furi_hal_gpio_write(furi_hal_subghz.async_mirror_pin, false);
furi_hal_subghz_capture_callback(
true, TIM2->CNT, (void*)furi_hal_subghz_capture_callback_context);
}
} else {
if(furi_hal_subghz_capture_callback) {
if(furi_hal_subghz.async_mirror_pin != NULL)
furi_hal_gpio_write(furi_hal_subghz.async_mirror_pin, true);
furi_hal_subghz_capture_callback(
false, TIM2->CNT, (void*)furi_hal_subghz_capture_callback_context);
}
}
TIM2->CNT = 6;
}
void furi_hal_subghz_start_async_rx(FuriHalSubGhzCaptureCallback callback, void* context) {
@ -573,43 +563,27 @@ void furi_hal_subghz_start_async_rx(FuriHalSubGhzCaptureCallback callback, void*
furi_hal_subghz_capture_callback = callback;
furi_hal_subghz_capture_callback_context = context;
if(furi_hal_subghz.radio_type == SubGhzRadioExternal) {
furi_hal_gpio_init(
furi_hal_subghz.cc1101_g0_pin,
GpioModeInterruptRiseFall,
GpioPullUp,
GpioSpeedVeryHigh);
furi_hal_gpio_add_int_callback(
furi_hal_subghz.cc1101_g0_pin,
furi_hal_subghz_capture_ISR,
furi_hal_subghz_capture_callback);
furi_hal_gpio_enable_int_callback(furi_hal_subghz.cc1101_g0_pin);
} else {
furi_hal_gpio_init_ex(
&gpio_cc1101_g0, GpioModeAltFunctionPushPull, GpioPullNo, GpioSpeedLow, GpioAltFn1TIM2);
}
// Timer: base
LL_TIM_InitTypeDef TIM_InitStruct = {0};
TIM_InitStruct.Prescaler = 64 - 1;
TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
TIM_InitStruct.Autoreload = 0x7FFFFFFE;
TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV4; // Clock division for capture filter
// Clock division for capture filter (for internal radio)
TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV4;
LL_TIM_Init(TIM2, &TIM_InitStruct);
// Timer: advanced
LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL);
LL_TIM_DisableARRPreload(TIM2);
LL_TIM_DisableDMAReq_TRIG(TIM2);
LL_TIM_DisableIT_TRIG(TIM2);
if(furi_hal_subghz.radio_type == SubGhzRadioInternal) {
LL_TIM_SetTriggerInput(TIM2, LL_TIM_TS_TI2FP2);
LL_TIM_SetSlaveMode(TIM2, LL_TIM_SLAVEMODE_RESET);
LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET);
LL_TIM_EnableMasterSlaveMode(TIM2);
}
LL_TIM_DisableDMAReq_TRIG(TIM2);
LL_TIM_DisableIT_TRIG(TIM2);
if(furi_hal_subghz.radio_type == SubGhzRadioInternal) {
// Timer: channel 1 indirect
LL_TIM_IC_SetActiveInput(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_ACTIVEINPUT_INDIRECTTI);
LL_TIM_IC_SetPrescaler(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_ICPSC_DIV1);
@ -623,13 +597,31 @@ void furi_hal_subghz_start_async_rx(FuriHalSubGhzCaptureCallback callback, void*
LL_TIM_IC_SetFilter(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_IC_FILTER_FDIV32_N8);
// ISR setup
furi_hal_interrupt_set_isr(FuriHalInterruptIdTIM2, furi_hal_subghz_capture_ISR, NULL);
furi_hal_interrupt_set_isr(FuriHalInterruptIdTIM2, furi_hal_subghz_capture_int_ISR, NULL);
// Interrupts and channels
LL_TIM_EnableIT_CC1(TIM2);
LL_TIM_EnableIT_CC2(TIM2);
LL_TIM_CC_EnableChannel(TIM2, LL_TIM_CHANNEL_CH1);
LL_TIM_CC_EnableChannel(TIM2, LL_TIM_CHANNEL_CH2);
furi_hal_gpio_init_ex(
furi_hal_subghz.cc1101_g0_pin,
GpioModeAltFunctionPushPull,
GpioPullNo,
GpioSpeedLow,
GpioAltFn1TIM2);
} else {
furi_hal_gpio_init(
furi_hal_subghz.cc1101_g0_pin,
GpioModeInterruptRiseFall,
GpioPullUp,
GpioSpeedVeryHigh);
furi_hal_gpio_add_int_callback(
furi_hal_subghz.cc1101_g0_pin,
furi_hal_subghz_capture_ext_ISR,
furi_hal_subghz_capture_callback);
furi_hal_gpio_enable_int_callback(furi_hal_subghz.cc1101_g0_pin);
}
// Start timer
@ -662,6 +654,9 @@ void furi_hal_subghz_stop_async_rx() {
FURI_CRITICAL_EXIT();
if(furi_hal_subghz.radio_type == SubGhzRadioInternal) {
furi_hal_interrupt_set_isr(FuriHalInterruptIdTIM2, NULL, NULL);
} else {
furi_hal_gpio_disable_int_callback(furi_hal_subghz.cc1101_g0_pin);
furi_hal_gpio_remove_int_callback(furi_hal_subghz.cc1101_g0_pin);
}
furi_hal_gpio_init(furi_hal_subghz.cc1101_g0_pin, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
@ -796,18 +791,18 @@ bool furi_hal_subghz_start_async_tx(FuriHalSubGhzAsyncTxCallback callback, void*
furi_hal_subghz_async_tx.buffer =
malloc(API_HAL_SUBGHZ_ASYNC_TX_BUFFER_FULL * sizeof(uint32_t));
if(furi_hal_subghz.radio_type == SubGhzRadioExternal) {
furi_hal_gpio_write(furi_hal_subghz.cc1101_g0_pin, true);
furi_hal_gpio_init(
furi_hal_subghz.cc1101_g0_pin, GpioModeOutputPushPull, GpioPullNo, GpioSpeedVeryHigh);
} else {
if(furi_hal_subghz.radio_type == SubGhzRadioInternal) {
// Connect CC1101_GD0 to TIM2 as output
furi_hal_gpio_init_ex(
&gpio_cc1101_g0,
furi_hal_subghz.cc1101_g0_pin,
GpioModeAltFunctionPushPull,
GpioPullDown,
GpioSpeedLow,
GpioAltFn1TIM2);
} else {
furi_hal_gpio_write(furi_hal_subghz.cc1101_g0_pin, true);
furi_hal_gpio_init(
furi_hal_subghz.cc1101_g0_pin, GpioModeOutputPushPull, GpioPullNo, GpioSpeedVeryHigh);
}
// Configure DMA
@ -882,8 +877,10 @@ bool furi_hal_subghz_start_async_tx(FuriHalSubGhzAsyncTxCallback callback, void*
if(((furi_hal_subghz.async_mirror_pin != NULL) &&
(furi_hal_subghz.radio_type == SubGhzRadioInternal)) ||
(furi_hal_subghz.radio_type == SubGhzRadioExternal)) {
furi_hal_subghz_debug_gpio_buff[0] = (uint32_t)gpio->pin << GPIO_NUMBER;
furi_hal_subghz_debug_gpio_buff[1] = gpio->pin;
furi_hal_subghz_debug_gpio_buff[0] =
((uint32_t)gpio->pin << GPIO_NUMBER) |
((uint32_t)furi_hal_subghz.async_mirror_pin->pin << GPIO_NUMBER);
furi_hal_subghz_debug_gpio_buff[1] = gpio->pin | furi_hal_subghz.async_mirror_pin->pin;
dma_config.MemoryOrM2MDstAddress = (uint32_t)furi_hal_subghz_debug_gpio_buff;
dma_config.PeriphOrM2MSrcAddress = (uint32_t) & (gpio->port->BSRR);