mirror of
https://github.com/DarkFlippers/unleashed-firmware.git
synced 2024-12-17 18:31:36 +03:00
37d7870e52
* FuriHal: port spi to ll. Bootloader: add spi and display. * Makefile: rollback disabled freertos introspection * FuriHal: spi lock asserts. F6: minor cleanup port sdcard shenanigans to furi_hal_gpio. * SdCard: port missing bits to furi-hal-gpio * FuriHal: fix broken RX in SPI, update SPI API usage. RFAL: more asserts in SPI platform code. * GUI: clear canvas on start. FuriHal: no pullup on radio spi bus. * FuriHal: use check instead of assert in spi lock routines * FuriHal: remove timeouts * SdHal: add guard time to SDCARD CS PIN control. * FuriHal: proper name for SPI device reconfigure routine. SdHal: one more enterprise delay and better documentation. * Bootloader: update DFU text and add image. * FuriHal: drop unused ST HAL modules. * SdHal: fixed swapped hal_gpio_init_ex arguments * SpiHal: fixed swapped hal_gpio_init_ex arguments * IrdaHal: use hal_gpio_init instead of hal_gpio_init_ex * RfidHal: fixed swapped hal_gpio_init_ex arguments Co-authored-by: DrZlo13 <who.just.the.doctor@gmail.com>
224 lines
7.5 KiB
C
224 lines
7.5 KiB
C
#include <target.h>
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#include <stm32wbxx.h>
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#include <stm32wbxx_ll_system.h>
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#include <stm32wbxx_ll_bus.h>
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#include <stm32wbxx_ll_utils.h>
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#include <stm32wbxx_ll_rcc.h>
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#include <stm32wbxx_ll_rtc.h>
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#include <stm32wbxx_ll_pwr.h>
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#include <stm32wbxx_ll_gpio.h>
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#include <stm32wbxx_hal_flash.h>
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#include <lib/toolbox/version.h>
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#include <furi-hal.h>
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#include <u8g2.h>
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const uint8_t I_Warning_30x23_0[] = {
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0x00, 0xC0, 0x00, 0x00, 0x00, 0xE0, 0x01, 0x00, 0x00, 0xF0, 0x03, 0x00, 0x00, 0xF0, 0x03, 0x00,
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0x00, 0xF8, 0x07, 0x00, 0x00, 0x3C, 0x0F, 0x00, 0x00, 0x3C, 0x0F, 0x00, 0x00, 0x3E, 0x1F, 0x00,
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0x00, 0x3F, 0x3F, 0x00, 0x00, 0x3F, 0x3F, 0x00, 0x80, 0x3F, 0x7F, 0x00, 0xC0, 0x3F, 0xFF, 0x00,
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0xC0, 0x3F, 0xFF, 0x00, 0xE0, 0x3F, 0xFF, 0x01, 0xF0, 0x3F, 0xFF, 0x03, 0xF0, 0x3F, 0xFF, 0x03,
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0xF8, 0x3F, 0xFF, 0x07, 0xFC, 0xFF, 0xFF, 0x0F, 0xFC, 0xFF, 0xFF, 0x0F, 0xFE, 0x3F, 0xFF, 0x1F,
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0xFF, 0x3F, 0xFF, 0x3F, 0xFF, 0xFF, 0xFF, 0x3F, 0xFE, 0xFF, 0xFF, 0x1F,
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};
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// Boot request enum
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#define BOOT_REQUEST_TAINTED 0x00000000
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#define BOOT_REQUEST_CLEAN 0xDADEDADE
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#define BOOT_REQUEST_DFU 0xDF00B000
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// Boot to DFU pin
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#define BOOT_DFU_PORT GPIOB
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#define BOOT_DFU_PIN LL_GPIO_PIN_11
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// USB pins
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#define BOOT_USB_PORT GPIOA
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#define BOOT_USB_DM_PIN LL_GPIO_PIN_11
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#define BOOT_USB_DP_PIN LL_GPIO_PIN_12
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#define BOOT_USB_PIN (BOOT_USB_DM_PIN | BOOT_USB_DP_PIN)
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#define RTC_CLOCK_IS_READY() (LL_RCC_LSE_IsReady() && LL_RCC_LSI1_IsReady())
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uint8_t u8g2_gpio_and_delay_stm32(u8x8_t* u8x8, uint8_t msg, uint8_t arg_int, void* arg_ptr);
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uint8_t u8x8_hw_spi_stm32(u8x8_t* u8x8, uint8_t msg, uint8_t arg_int, void* arg_ptr);
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void target_led_control(char* c) {
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furi_hal_light_set(LightRed, 0x00);
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furi_hal_light_set(LightGreen, 0x00);
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furi_hal_light_set(LightBlue, 0x00);
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do {
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if(*c == 'R') {
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furi_hal_light_set(LightRed, 0xFF);
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} else if(*c == 'G') {
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furi_hal_light_set(LightGreen, 0xFF);
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} else if(*c == 'B') {
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furi_hal_light_set(LightBlue, 0xFF);
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} else if(*c == '.') {
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LL_mDelay(125);
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furi_hal_light_set(LightRed, 0x00);
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furi_hal_light_set(LightGreen, 0x00);
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furi_hal_light_set(LightBlue, 0x00);
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LL_mDelay(125);
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} else if(*c == '-') {
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LL_mDelay(250);
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furi_hal_light_set(LightRed, 0x00);
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furi_hal_light_set(LightGreen, 0x00);
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furi_hal_light_set(LightBlue, 0x00);
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LL_mDelay(250);
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} else if(*c == '|') {
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furi_hal_light_set(LightRed, 0x00);
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furi_hal_light_set(LightGreen, 0x00);
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furi_hal_light_set(LightBlue, 0x00);
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}
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c++;
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} while(*c != 0);
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}
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void target_clock_init() {
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LL_Init1msTick(4000000);
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LL_SetSystemCoreClock(4000000);
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LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);
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LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB);
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LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC);
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LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOD);
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LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOE);
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LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOH);
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LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI1);
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LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2);
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}
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void target_gpio_init() {
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// USB D+
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LL_GPIO_SetPinMode(BOOT_USB_PORT, BOOT_USB_DP_PIN, LL_GPIO_MODE_OUTPUT);
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LL_GPIO_SetPinSpeed(BOOT_USB_PORT, BOOT_USB_DP_PIN, LL_GPIO_SPEED_FREQ_VERY_HIGH);
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LL_GPIO_SetPinOutputType(BOOT_USB_PORT, BOOT_USB_DP_PIN, LL_GPIO_OUTPUT_OPENDRAIN);
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// USB D-
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LL_GPIO_SetPinMode(BOOT_USB_PORT, BOOT_USB_DM_PIN, LL_GPIO_MODE_OUTPUT);
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LL_GPIO_SetPinSpeed(BOOT_USB_PORT, BOOT_USB_DM_PIN, LL_GPIO_SPEED_FREQ_VERY_HIGH);
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LL_GPIO_SetPinOutputType(BOOT_USB_PORT, BOOT_USB_DM_PIN, LL_GPIO_OUTPUT_OPENDRAIN);
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// Button: back
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LL_GPIO_SetPinMode(BOOT_DFU_PORT, BOOT_DFU_PIN, LL_GPIO_MODE_INPUT);
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LL_GPIO_SetPinPull(BOOT_DFU_PORT, BOOT_DFU_PIN, LL_GPIO_PULL_UP);
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}
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void target_rtc_init() {
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// LSE and RTC
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LL_PWR_EnableBkUpAccess();
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if(!RTC_CLOCK_IS_READY()) {
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// Start LSI1 needed for CSS
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LL_RCC_LSI1_Enable();
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// Try to start LSE normal way
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LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_HIGH);
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LL_RCC_LSE_Enable();
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uint32_t c = 0;
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while(!RTC_CLOCK_IS_READY() && c < 200) {
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LL_mDelay(10);
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c++;
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}
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// Plan B: reset backup domain
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if(!RTC_CLOCK_IS_READY()) {
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target_led_control("-R.R.R.");
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LL_RCC_ForceBackupDomainReset();
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LL_RCC_ReleaseBackupDomainReset();
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NVIC_SystemReset();
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}
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// Set RTC domain clock to LSE
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LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
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// Enable LSE CSS
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LL_RCC_LSE_EnableCSS();
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}
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// Enable clocking
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LL_RCC_EnableRTC();
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LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_RTCAPB);
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}
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void target_version_save(void) {
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LL_RTC_BAK_SetRegister(RTC, LL_RTC_BKP_DR1, (uint32_t)version_get());
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}
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void target_usb_wire_reset() {
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LL_GPIO_ResetOutputPin(BOOT_USB_PORT, BOOT_USB_PIN);
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LL_mDelay(10);
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LL_GPIO_SetOutputPin(BOOT_USB_PORT, BOOT_USB_PIN);
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}
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void target_display_init() {
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// Prepare gpio
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hal_gpio_init_simple(&gpio_display_rst, GpioModeOutputPushPull);
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hal_gpio_init_simple(&gpio_display_di, GpioModeOutputPushPull);
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// Initialize
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u8g2_t fb;
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u8g2_Setup_st7565_erc12864_alt_f(&fb, U8G2_R0, u8x8_hw_spi_stm32, u8g2_gpio_and_delay_stm32);
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u8g2_InitDisplay(&fb);
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u8g2_SetContrast(&fb, 36);
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// Create payload
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u8g2_ClearBuffer(&fb);
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u8g2_SetDrawColor(&fb, 0x01);
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u8g2_SetFont(&fb, u8g2_font_helvB08_tf);
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u8g2_DrawStr(&fb, 2, 8, "Recovery & Update Mode");
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u8g2_DrawXBM(&fb, 49, 14, 30, 23, I_Warning_30x23_0);
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u8g2_DrawStr(&fb, 2, 50, "DFU Bootloader activated");
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u8g2_DrawStr(&fb, 6, 62, "www.flipp.dev/recovery");
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// Send buffer
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u8g2_SetPowerSave(&fb, 0);
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u8g2_SendBuffer(&fb);
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}
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void target_init() {
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target_clock_init();
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target_gpio_init();
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furi_hal_init();
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target_led_control("RGB");
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target_rtc_init();
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target_version_save();
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target_usb_wire_reset();
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// Errata 2.2.9, Flash OPTVERR flag is always set after system reset
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__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_ALL_ERRORS);
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}
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int target_is_dfu_requested() {
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if(LL_RTC_BAK_GetRegister(RTC, LL_RTC_BKP_DR0) == BOOT_REQUEST_TAINTED) {
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// Default system state is tainted
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// We must ensure that MCU is cleanly booted
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LL_RTC_BAK_SetRegister(RTC, LL_RTC_BKP_DR0, BOOT_REQUEST_CLEAN);
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NVIC_SystemReset();
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} else if(LL_RTC_BAK_GetRegister(RTC, LL_RTC_BKP_DR0) == BOOT_REQUEST_DFU) {
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return 1;
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}
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LL_mDelay(100);
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if(!LL_GPIO_IsInputPinSet(BOOT_DFU_PORT, BOOT_DFU_PIN)) {
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return 1;
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}
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return 0;
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}
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void target_switch(void* offset) {
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asm volatile("ldr r3, [%0] \n"
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"msr msp, r3 \n"
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"ldr r3, [%1] \n"
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"mov pc, r3 \n"
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:
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: "r"(offset), "r"(offset + 0x4)
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: "r3");
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}
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void target_switch2dfu() {
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target_led_control("B");
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furi_hal_light_set(LightBacklight, 0xFF);
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target_display_init();
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// Mark system as tainted, it will be soon
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LL_RTC_BAK_SetRegister(RTC, LL_RTC_BKP_DR0, BOOT_REQUEST_TAINTED);
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// Remap memory to system bootloader
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LL_SYSCFG_SetRemapMemory(LL_SYSCFG_REMAP_SYSTEMFLASH);
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// Jump
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target_switch(0x0);
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}
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void target_switch2os() {
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target_led_control("G");
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SCB->VTOR = OS_OFFSET;
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target_switch((void*)(BOOT_ADDRESS + OS_OFFSET));
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}
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