mirror of
https://github.com/DarkFlippers/unleashed-firmware.git
synced 2024-12-18 19:01:47 +03:00
167 lines
6.4 KiB
C++
167 lines
6.4 KiB
C++
#pragma once
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#include "flipper_v2.h"
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/*******************************debug mode*************************************/
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// #define CC1101_DEBUG 1
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//******************************CC1101 defines ********************************
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//******************************config registers *****************************
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#define CC1101_IOCFG2 0x00 //GDO2 output pin configration
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#define CC1101_IOCFG1 0x01 // GDO1 output pin configuration
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#define CC1101_IOCFG0 0x02 // GDO0 output pin configuration
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#define CC1101_FIFOTHR 0x03 // RX FIFO and TX FIFO thresholds
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#define CC1101_SYNC1 0x04 // Sync word, high INT8U
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#define CC1101_SYNC0 0x05 // Sync word, low INT8U
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#define CC1101_PKTLEN 0x06 // Packet length
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#define CC1101_PKTCTRL1 0x07 // Packet automation control
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#define CC1101_PKTCTRL0 0x08 // Packet automation control
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#define CC1101_ADDR 0x09 // Device address
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#define CC1101_CHANNR 0x0A // Channel number
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#define CC1101_FSCTRL1 0x0B // Frequency synthesizer control
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#define CC1101_FSCTRL0 0x0C // Frequency synthesizer control
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#define CC1101_FREQ2 0x0D // Frequency control word, high INT8U
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#define CC1101_FREQ1 0x0E // Frequency control word, middle INT8U
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#define CC1101_FREQ0 0x0F // Frequency control word, low INT8U
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#define CC1101_MDMCFG4 0x10 // Modem configuration
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#define CC1101_MDMCFG3 0x11 // Modem configuration
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#define CC1101_MDMCFG2 0x12 // Modem configuration
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#define CC1101_MDMCFG1 0x13 // Modem configuration
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#define CC1101_MDMCFG0 0x14 // Modem configuration
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#define CC1101_DEVIATN 0x15 // Modem deviation setting
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#define CC1101_MCSM2 0x16 // Main Radio Control State Machine configuration
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#define CC1101_MCSM1 0x17 // Main Radio Control State Machine configuration
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#define CC1101_MCSM0 0x18 // Main Radio Control State Machine configuration
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#define CC1101_FOCCFG 0x19 // Frequency Offset Compensation configuration
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#define CC1101_BSCFG 0x1A // Bit Synchronization configuration
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#define CC1101_AGCCTRL2 0x1B // AGC control
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#define CC1101_AGCCTRL1 0x1C // AGC control
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#define CC1101_AGCCTRL0 0x1D // AGC control
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#define CC1101_WOREVT1 0x1E // High INT8U Event 0 timeout
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#define CC1101_WOREVT0 0x1F // Low INT8U Event 0 timeout
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#define CC1101_WORCTRL 0x20 // Wake On Radio control
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#define CC1101_FREND1 0x21 // Front end RX configuration
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#define CC1101_FREND0 0x22 // Front end TX configuration
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#define CC1101_FSCAL3 0x23 // Frequency synthesizer calibration
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#define CC1101_FSCAL2 0x24 // Frequency synthesizer calibration
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#define CC1101_FSCAL1 0x25 // Frequency synthesizer calibration
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#define CC1101_FSCAL0 0x26 // Frequency synthesizer calibration
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#define CC1101_RCCTRL1 0x27 // RC oscillator configuration
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#define CC1101_RCCTRL0 0x28 // RC oscillator configuration
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#define CC1101_FSTEST 0x29 // Frequency synthesizer calibration control
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#define CC1101_PTEST 0x2A // Production test
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#define CC1101_AGCTEST 0x2B // AGC test
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#define CC1101_TEST2 0x2C // Various test settings
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#define CC1101_TEST1 0x2D // Various test settings
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#define CC1101_TEST0 0x2E // Various test settings
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//*********************CC1101 Strobe commands *********************************
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#define CC1101_SRES 0x30 // Reset chip.
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// Enable and calibrate frequency synthesizer (if MCSM0.FS_AUTOCAL=1).
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// If in RX/TX: Go to a wait state where only the synthesizer is
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// running (for quick RX / TX turnaround).
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#define CC1101_SFSTXON 0x31
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#define CC1101_SXOFF 0x32 // Turn off crystal oscillator.
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// Calibrate frequency synthesizer and turn it off
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// (enables quick start).
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#define CC1101_SCAL 0x33
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// Enable RX. Perform calibration first if coming from IDLE and
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// MCSM0.FS_AUTOCAL=1.
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#define CC1101_SRX 0x34
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// In IDLE state: Enable TX. Perform calibration first if
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// MCSM0.FS_AUTOCAL=1. If in RX state and CCA is enabled:
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// Only go to TX if channel is clear.
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#define CC1101_STX 0x35
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// Exit RX / TX, turn off frequency synthesizer and exit
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// Wake-On-Radio mode if applicable.
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#define CC1101_SIDLE 0x36
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#define CC1101_SAFC 0x37 // Perform AFC adjustment of the frequency synthesizer
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#define CC1101_SWOR 0x38 // Start automatic RX polling sequence (Wake-on-Radio)
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#define CC1101_SPWD 0x39 // Enter power down mode when CSn goes high.
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#define CC1101_SFRX 0x3A // Flush the RX FIFO buffer.
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#define CC1101_SFTX 0x3B // Flush the TX FIFO buffer.
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#define CC1101_SWORRST 0x3C // Reset real time clock.
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// No operation. May be used to pad strobe commands to two
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// INT8Us for simpler software.
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#define CC1101_SNOP 0x3D
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//**************************CC1101 STATUS REGSITER ****************************
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//use burst read to access
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#define CC1101_PARTNUM 0x30
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#define CC1101_VERSION 0x31
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#define CC1101_FREQEST 0x32
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#define CC1101_LQI 0x33
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#define CC1101_RSSI 0x34
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#define CC1101_MARCSTATE 0x35
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#define CC1101_WORTIME1 0x36
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#define CC1101_WORTIME0 0x37
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#define CC1101_PKTSTATUS 0x38
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#define CC1101_VCO_VC_DAC 0x39
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#define CC1101_TXBYTES 0x3A
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#define CC1101_RXBYTES 0x3B
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#define CC1101_RCCTRL1_STATUS 0x3C
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#define CC1101_RCCTRL_STATUS 0x3D
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/****************************cc1101 status ***********************************/
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#define CC1101_STATUS_RX 0x0D
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#define CC1101_STATUS_TX 0x13
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//***********************CC1101 PATABLE,TXFIFO,RXFIFO**************************
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#define CC1101_PATABLE 0x3E
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#define CC1101_TXFIFO 0x3F
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#define CC1101_RXFIFO 0x3F
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//******************************* pins ****************************************
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// #define SCK_PIN 13
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// #define MISO_PIN 12
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// #define MOSI_PIN 11
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// #define SS_PIN 10
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// #define GDO0 8 //pin assignment
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// #define GDO2 9
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//*****************************CC1101 Config**********************************
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//no pa ramping, output power to 10dBm
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#define POWER 0xC0 //output power to maximum
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//modulation
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#define FSK2 0x00
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#define GFSK 0x10
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#define ASK 0x30
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#define FSK4 0x40
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#define MSK 0x70
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//******************************** class **************************************//
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class CC1101 {
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private:
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GpioPin ss_pin;
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GpioPin gdo0_pin;
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GpioPin gdo2_pin;
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private:
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void SpiMode(byte config);
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byte SpiTransfer(byte value);
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void Reset(void);
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void SpiWriteBurstReg(byte addr, byte* buffer, byte num);
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byte SpiReadReg(byte addr);
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void SpiReadBurstReg(byte addr, byte* buffer, byte num);
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void RegConfigSettings(void);
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public:
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CC1101(GpioPin ss_pin);
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void SpiWriteReg(byte addr, byte value);
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void SpiInit(void);
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void SpiEnd(void);
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void SetMod(byte mode);
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void SetFreq(byte Freq2, byte Freq1, byte Freq0);
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byte Init(void);
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void SpiStrobe(byte strobe);
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byte SpiReadStatus(byte addr);
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void SetReceive(void);
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void SetTransmit(void);
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void SetChannel(int channel);
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};
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