mirror of
https://github.com/DarkFlippers/unleashed-firmware.git
synced 2024-12-29 00:09:19 +03:00
734820c137
* Targets: add F6 * F6: Update linker script for use with internal storage * F6: synchronize with F5, add all changes arriving in V9 board, update cube project. Github workflow: add multi-target build, add F6 to build targets. * CI: fix full assembly * CI: better artifact naming scheme * CI: fix artifacts wildcard * F6: Swap C10 - A15, vibro and sdcard detect pins
475 lines
15 KiB
C
475 lines
15 KiB
C
#pragma once
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#include "hw.h"
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#include "hw_conf.h"
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#include "hw_if.h"
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#include "ble_bufsize.h"
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#define CFG_TX_POWER (0x19) /* +0dBm */
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/**
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* Define Advertising parameters
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*/
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#define CFG_ADV_BD_ADDRESS (0x7257acd87a6c)
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#define CFG_FAST_CONN_ADV_INTERVAL_MIN (0x80) /**< 80ms */
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#define CFG_FAST_CONN_ADV_INTERVAL_MAX (0xa0) /**< 100ms */
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#define CFG_LP_CONN_ADV_INTERVAL_MIN (0x640) /**< 1s */
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#define CFG_LP_CONN_ADV_INTERVAL_MAX (0xfa0) /**< 2.5s */
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/**
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* Define IO Authentication
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*/
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#define CFG_BONDING_MODE (1)
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#define CFG_FIXED_PIN (111111)
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#define CFG_USED_FIXED_PIN (1)
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#define CFG_ENCRYPTION_KEY_SIZE_MAX (16)
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#define CFG_ENCRYPTION_KEY_SIZE_MIN (8)
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/**
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* Define IO capabilities
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*/
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#define CFG_IO_CAPABILITY_DISPLAY_ONLY (0x00)
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#define CFG_IO_CAPABILITY_DISPLAY_YES_NO (0x01)
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#define CFG_IO_CAPABILITY_KEYBOARD_ONLY (0x02)
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#define CFG_IO_CAPABILITY_NO_INPUT_NO_OUTPUT (0x03)
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#define CFG_IO_CAPABILITY_KEYBOARD_DISPLAY (0x04)
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#define CFG_IO_CAPABILITY CFG_IO_CAPABILITY_DISPLAY_YES_NO
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/**
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* Define MITM modes
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*/
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#define CFG_MITM_PROTECTION_NOT_REQUIRED (0x00)
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#define CFG_MITM_PROTECTION_REQUIRED (0x01)
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#define CFG_MITM_PROTECTION CFG_MITM_PROTECTION_REQUIRED
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/**
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* Define Secure Connections Support
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*/
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#define CFG_SECURE_NOT_SUPPORTED (0x00)
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#define CFG_SECURE_OPTIONAL (0x01)
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#define CFG_SECURE_MANDATORY (0x02)
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#define CFG_SC_SUPPORT CFG_SECURE_OPTIONAL
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/**
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* Define Keypress Notification Support
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*/
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#define CFG_KEYPRESS_NOT_SUPPORTED (0x00)
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#define CFG_KEYPRESS_SUPPORTED (0x01)
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#define CFG_KEYPRESS_NOTIFICATION_SUPPORT CFG_KEYPRESS_NOT_SUPPORTED
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/**
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* Numeric Comparison Answers
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*/
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#define YES (0x01)
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#define NO (0x00)
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/**
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* Device name configuration for Generic Access Service
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*/
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#define CFG_GAP_DEVICE_NAME "TEMPLATE"
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#define CFG_GAP_DEVICE_NAME_LENGTH (8)
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/**
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* Define PHY
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*/
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#define ALL_PHYS_PREFERENCE 0x00
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#define RX_2M_PREFERRED 0x02
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#define TX_2M_PREFERRED 0x02
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#define TX_1M 0x01
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#define TX_2M 0x02
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#define RX_1M 0x01
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#define RX_2M 0x02
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/**
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* Identity root key used to derive LTK and CSRK
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*/
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#define CFG_BLE_IRK {0x12,0x34,0x56,0x78,0x9a,0xbc,0xde,0xf0,0x12,0x34,0x56,0x78,0x9a,0xbc,0xde,0xf0}
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/**
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* Encryption root key used to derive LTK and CSRK
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*/
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#define CFG_BLE_ERK {0xfe,0xdc,0xba,0x09,0x87,0x65,0x43,0x21,0xfe,0xdc,0xba,0x09,0x87,0x65,0x43,0x21}
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/* USER CODE BEGIN Generic_Parameters */
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/**
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* SMPS supply
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* SMPS not used when Set to 0
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* SMPS used when Set to 1
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*/
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#define CFG_USE_SMPS 1
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/* USER CODE END Generic_Parameters */
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/**< specific parameters */
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/*****************************************************/
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/**
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* AD Element - Group B Feature
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*/
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/* LSB - Second Byte */
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#define CFG_FEATURE_OTA_REBOOT (0x20)
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/******************************************************************************
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* BLE Stack
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******************************************************************************/
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/**
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* Maximum number of simultaneous connections that the device will support.
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* Valid values are from 1 to 8
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*/
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#define CFG_BLE_NUM_LINK 2
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/**
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* Maximum number of Services that can be stored in the GATT database.
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* Note that the GAP and GATT services are automatically added so this parameter should be 2 plus the number of user services
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*/
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#define CFG_BLE_NUM_GATT_SERVICES 8
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/**
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* Maximum number of Attributes
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* (i.e. the number of characteristic + the number of characteristic values + the number of descriptors, excluding the services)
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* that can be stored in the GATT database.
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* Note that certain characteristics and relative descriptors are added automatically during device initialization
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* so this parameters should be 9 plus the number of user Attributes
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*/
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#define CFG_BLE_NUM_GATT_ATTRIBUTES 68
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/**
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* Maximum supported ATT_MTU size
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*/
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#define CFG_BLE_MAX_ATT_MTU (156)
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/**
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* Size of the storage area for Attribute values
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* This value depends on the number of attributes used by application. In particular the sum of the following quantities (in octets) should be made for each attribute:
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* - attribute value length
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* - 5, if UUID is 16 bit; 19, if UUID is 128 bit
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* - 2, if server configuration descriptor is used
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* - 2*DTM_NUM_LINK, if client configuration descriptor is used
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* - 2, if extended properties is used
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* The total amount of memory needed is the sum of the above quantities for each attribute.
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*/
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#define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344)
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/**
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* Prepare Write List size in terms of number of packet
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*/
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#define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU)
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/**
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* Number of allocated memory blocks
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*/
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#define CFG_BLE_MBLOCK_COUNT (BLE_MBLOCKS_CALC(CFG_BLE_PREPARE_WRITE_LIST_SIZE, CFG_BLE_MAX_ATT_MTU, CFG_BLE_NUM_LINK))
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/**
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* Enable or disable the Extended Packet length feature. Valid values are 0 or 1.
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*/
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#define CFG_BLE_DATA_LENGTH_EXTENSION 1
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/**
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* Sleep clock accuracy in Slave mode (ppm value)
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*/
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#define CFG_BLE_SLAVE_SCA 500
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/**
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* Sleep clock accuracy in Master mode
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* 0 : 251 ppm to 500 ppm
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* 1 : 151 ppm to 250 ppm
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* 2 : 101 ppm to 150 ppm
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* 3 : 76 ppm to 100 ppm
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* 4 : 51 ppm to 75 ppm
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* 5 : 31 ppm to 50 ppm
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* 6 : 21 ppm to 30 ppm
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* 7 : 0 ppm to 20 ppm
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*/
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#define CFG_BLE_MASTER_SCA 0
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/**
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* Source for the low speed clock for RF wake-up
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* 1 : external high speed crystal HSE/32/32
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* 0 : external low speed crystal ( no calibration )
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*/
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#define CFG_BLE_LSE_SOURCE 0
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/**
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* Start up time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 us (~2.44 us)
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*/
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#define CFG_BLE_HSE_STARTUP_TIME 0x148
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/**
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* Maximum duration of the connection event when the device is in Slave mode in units of 625/256 us (~2.44 us)
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*/
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#define CFG_BLE_MAX_CONN_EVENT_LENGTH ( 0xFFFFFFFF )
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/**
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* Viterbi Mode
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* 1 : enabled
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* 0 : disabled
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*/
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#define CFG_BLE_VITERBI_MODE 1
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/**
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* LL Only Mode
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* 1 : LL Only
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* 0 : LL + Host
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*/
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#define CFG_BLE_LL_ONLY 0
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/******************************************************************************
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* Transport Layer
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******************************************************************************/
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/**
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* Queue length of BLE Event
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* This parameter defines the number of asynchronous events that can be stored in the HCI layer before
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* being reported to the application. When a command is sent to the BLE core coprocessor, the HCI layer
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* is waiting for the event with the Num_HCI_Command_Packets set to 1. The receive queue shall be large
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* enough to store all asynchronous events received in between.
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* When CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE is set to 27, this allow to store three 255 bytes long asynchronous events
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* between the HCI command and its event.
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* This parameter depends on the value given to CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE. When the queue size is to small,
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* the system may hang if the queue is full with asynchronous events and the HCI layer is still waiting
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* for a CC/CS event, In that case, the notification TL_BLE_HCI_ToNot() is called to indicate
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* to the application a HCI command did not receive its command event within 30s (Default HCI Timeout).
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*/
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#define CFG_TLBLE_EVT_QUEUE_LENGTH 5
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/**
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* This parameter should be set to fit most events received by the HCI layer. It defines the buffer size of each element
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* allocated in the queue of received events and can be used to optimize the amount of RAM allocated by the Memory Manager.
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* It should not exceed 255 which is the maximum HCI packet payload size (a greater value is a lost of memory as it will
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* never be used)
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* With the current wireless firmware implementation, this parameter shall be kept to 255
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*
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*/
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#define CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE 255 /**< Set to 255 with the memory manager and the mailbox */
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#define TL_BLE_EVENT_FRAME_SIZE ( TL_EVT_HDR_SIZE + CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE )
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/******************************************************************************
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* UART interfaces
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******************************************************************************/
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/**
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* Select UART interfaces
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*/
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#define CFG_DEBUG_TRACE_UART hw_uart1
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#define CFG_CONSOLE_MENU 0
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/******************************************************************************
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* Low Power
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******************************************************************************/
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/**
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* When set to 1, the low power mode is enable
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* When set to 0, the device stays in RUN mode
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*/
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#define CFG_LPM_SUPPORTED 1
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/******************************************************************************
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* Timer Server
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******************************************************************************/
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/**
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* CFG_RTC_WUCKSEL_DIVIDER: This sets the RTCCLK divider to the wakeup timer.
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* The lower is the value, the better is the power consumption and the accuracy of the timerserver
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* The higher is the value, the finest is the granularity
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*
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* CFG_RTC_ASYNCH_PRESCALER: This sets the asynchronous prescaler of the RTC. It should as high as possible ( to ouput
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* clock as low as possible) but the output clock should be equal or higher frequency compare to the clock feeding
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* the wakeup timer. A lower clock speed would impact the accuracy of the timer server.
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*
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* CFG_RTC_SYNCH_PRESCALER: This sets the synchronous prescaler of the RTC.
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* When the 1Hz calendar clock is required, it shall be sets according to other settings
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* When the 1Hz calendar clock is not needed, CFG_RTC_SYNCH_PRESCALER should be set to 0x7FFF (MAX VALUE)
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*
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* CFG_RTCCLK_DIVIDER_CONF:
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* Shall be set to either 0,2,4,8,16
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* When set to either 2,4,8,16, the 1Hhz calendar is supported
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* When set to 0, the user sets its own configuration
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*
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* The following settings are computed with LSI as input to the RTC
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*/
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#define CFG_RTCCLK_DIVIDER_CONF 0
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#if (CFG_RTCCLK_DIVIDER_CONF == 0)
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/**
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* Custom configuration
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* It does not support 1Hz calendar
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* It divides the RTC CLK by 16
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*/
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#define CFG_RTCCLK_DIV (16)
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#define CFG_RTC_WUCKSEL_DIVIDER (0)
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#define CFG_RTC_ASYNCH_PRESCALER (CFG_RTCCLK_DIV - 1)
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#define CFG_RTC_SYNCH_PRESCALER (0x7FFF)
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#else
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#if (CFG_RTCCLK_DIVIDER_CONF == 2)
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/**
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* It divides the RTC CLK by 2
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*/
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#define CFG_RTC_WUCKSEL_DIVIDER (3)
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#endif
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#if (CFG_RTCCLK_DIVIDER_CONF == 4)
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/**
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* It divides the RTC CLK by 4
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*/
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#define CFG_RTC_WUCKSEL_DIVIDER (2)
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#endif
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#if (CFG_RTCCLK_DIVIDER_CONF == 8)
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/**
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* It divides the RTC CLK by 8
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*/
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#define CFG_RTC_WUCKSEL_DIVIDER (1)
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#endif
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#if (CFG_RTCCLK_DIVIDER_CONF == 16)
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/**
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* It divides the RTC CLK by 16
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*/
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#define CFG_RTC_WUCKSEL_DIVIDER (0)
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#endif
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#define CFG_RTCCLK_DIV CFG_RTCCLK_DIVIDER_CONF
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#define CFG_RTC_ASYNCH_PRESCALER (CFG_RTCCLK_DIV - 1)
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#define CFG_RTC_SYNCH_PRESCALER (DIVR( LSE_VALUE, (CFG_RTC_ASYNCH_PRESCALER+1) ) - 1 )
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#endif
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/** tick timer value in us */
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#define CFG_TS_TICK_VAL DIVR( (CFG_RTCCLK_DIV * 1000000), LSE_VALUE )
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typedef enum
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{
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CFG_TIM_PROC_ID_ISR,
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/* USER CODE BEGIN CFG_TimProcID_t */
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/* USER CODE END CFG_TimProcID_t */
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} CFG_TimProcID_t;
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/******************************************************************************
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* Debug
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******************************************************************************/
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/**
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* When set, this resets some hw resources to set the device in the same state than the power up
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* The FW resets only register that may prevent the FW to run properly
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*
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* This shall be set to 0 in a final product
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*
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*/
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#define CFG_HW_RESET_BY_FW 0
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/**
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* keep debugger enabled while in any low power mode when set to 1
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* should be set to 0 in production
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*/
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#define CFG_DEBUGGER_SUPPORTED 0
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/**
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* When set to 1, the traces are enabled in the BLE services
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*/
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#define CFG_DEBUG_BLE_TRACE 1
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/**
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* Enable or Disable traces in application
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*/
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#define CFG_DEBUG_APP_TRACE 1
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#if (CFG_DEBUG_APP_TRACE != 0)
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#define APP_DBG_MSG PRINT_MESG_DBG
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#else
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#define APP_DBG_MSG PRINT_NO_MESG
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#endif
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#if ( (CFG_DEBUG_BLE_TRACE != 0) || (CFG_DEBUG_APP_TRACE != 0) )
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#define CFG_DEBUG_TRACE 1
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#endif
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#if (CFG_DEBUG_TRACE != 0)
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#undef CFG_LPM_SUPPORTED
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#undef CFG_DEBUGGER_SUPPORTED
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#define CFG_LPM_SUPPORTED 0
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#define CFG_DEBUGGER_SUPPORTED 1
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#endif
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/**
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* When CFG_DEBUG_TRACE_FULL is set to 1, the trace are output with the API name, the file name and the line number
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* When CFG_DEBUG_TRACE_LIGHT is set to 1, only the debug message is output
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*
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* When both are set to 0, no trace are output
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* When both are set to 1, CFG_DEBUG_TRACE_FULL is selected
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*/
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#define CFG_DEBUG_TRACE_LIGHT 0
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#define CFG_DEBUG_TRACE_FULL 0
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#if (( CFG_DEBUG_TRACE != 0 ) && ( CFG_DEBUG_TRACE_LIGHT == 0 ) && (CFG_DEBUG_TRACE_FULL == 0))
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#undef CFG_DEBUG_TRACE_FULL
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#undef CFG_DEBUG_TRACE_LIGHT
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#define CFG_DEBUG_TRACE_FULL 0
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#define CFG_DEBUG_TRACE_LIGHT 1
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#endif
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#if ( CFG_DEBUG_TRACE == 0 )
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#undef CFG_DEBUG_TRACE_FULL
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#undef CFG_DEBUG_TRACE_LIGHT
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#define CFG_DEBUG_TRACE_FULL 0
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#define CFG_DEBUG_TRACE_LIGHT 0
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#endif
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/**
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* When not set, the traces is looping on sending the trace over UART
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*/
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#define DBG_TRACE_USE_CIRCULAR_QUEUE 0
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/**
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* max buffer Size to queue data traces and max data trace allowed.
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* Only Used if DBG_TRACE_USE_CIRCULAR_QUEUE is defined
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*/
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#define DBG_TRACE_MSG_QUEUE_SIZE 4096
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#define MAX_DBG_TRACE_MSG_SIZE 1024
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#define CFG_LED_SUPPORTED 0
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#define CFG_BUTTON_SUPPORTED 0
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/******************************************************************************
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* FreeRTOS
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******************************************************************************/
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#define CFG_SHCI_USER_EVT_PROCESS_NAME "ble_shci_evt"
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#define CFG_SHCI_USER_EVT_PROCESS_ATTR_BITS (0)
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#define CFG_SHCI_USER_EVT_PROCESS_CB_MEM (0)
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#define CFG_SHCI_USER_EVT_PROCESS_CB_SIZE (0)
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#define CFG_SHCI_USER_EVT_PROCESS_STACK_MEM (0)
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#define CFG_SHCI_USER_EVT_PROCESS_PRIORITY osPriorityNone
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#define CFG_SHCI_USER_EVT_PROCESS_STACK_SIZE (128 * 7)
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#define CFG_HCI_USER_EVT_PROCESS_NAME "ble_hci_evt"
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#define CFG_HCI_USER_EVT_PROCESS_ATTR_BITS (0)
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#define CFG_HCI_USER_EVT_PROCESS_CB_MEM (0)
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#define CFG_HCI_USER_EVT_PROCESS_CB_SIZE (0)
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#define CFG_HCI_USER_EVT_PROCESS_STACK_MEM (0)
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#define CFG_HCI_USER_EVT_PROCESS_PRIORITY osPriorityNone
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#define CFG_HCI_USER_EVT_PROCESS_STACK_SIZE (128 * 8)
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#define CFG_ADV_UPDATE_PROCESS_NAME "ble_adv_upd"
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#define CFG_ADV_UPDATE_PROCESS_ATTR_BITS (0)
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#define CFG_ADV_UPDATE_PROCESS_CB_MEM (0)
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#define CFG_ADV_UPDATE_PROCESS_CB_SIZE (0)
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#define CFG_ADV_UPDATE_PROCESS_STACK_MEM (0)
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#define CFG_ADV_UPDATE_PROCESS_PRIORITY osPriorityNone
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#define CFG_ADV_UPDATE_PROCESS_STACK_SIZE (128 * 6)
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#define CFG_HRS_PROCESS_NAME "hrs"
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#define CFG_HRS_PROCESS_ATTR_BITS (0)
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#define CFG_HRS_PROCESS_CB_MEM (0)
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#define CFG_HRS_PROCESS_CB_SIZE (0)
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#define CFG_HRS_PROCESS_STACK_MEM (0)
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#define CFG_HRS_PROCESS_PRIORITY osPriorityNone
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#define CFG_HRS_PROCESS_STACK_SIZE (128 * 8)
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typedef enum {
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CFG_LPM_APP,
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CFG_LPM_APP_BLE,
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} CFG_LPM_Id_t;
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#define CFG_OTP_BASE_ADDRESS OTP_AREA_BASE
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#define CFG_OTP_END_ADRESS OTP_AREA_END_ADDR
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