mirror of
https://github.com/DarkFlippers/unleashed-firmware.git
synced 2024-12-26 23:05:05 +03:00
c3ececcf96
* ufbt: added "dolphin_ext" target (expects "external" subfolder in cwd with dolphin assets); cleaned up unused code * ufbt: codestyle fixes * scripts: fixed style according to ruff linter * scripts: additional cleanup & codestyle fixes * github: pass target hw code when installing local SDK with ufbt * ufbt: added error message for missing folder in dolphin builder * scripts: more linter fixes * sdk: added flipper_format_stream; ufbt: support for --extra-define * fbt: reduced amount of global defines * scripts, fbt: rearranged imports Co-authored-by: Aleksandr Kutuzov <alleteam@gmail.com>
353 lines
12 KiB
Python
353 lines
12 KiB
Python
import logging
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from enum import Enum
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from flipper.utils.openocd import OpenOCD
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from flipper.utils.register import Register32, RegisterBitDefinition
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class STM32WB55:
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# Address of OTP memory in flash
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OTP_BASE = 0x1FFF7000
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# Address of Option byte in flash
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OPTION_BYTE_BASE = 0x1FFF8000
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# Flash base address
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FLASH_BASE = 0x58004000
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# Flash unlock register
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FLASH_KEYR = FLASH_BASE + 0x08
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# Option byte unlock register
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FLASH_OPTKEYR = FLASH_BASE + 0x0C
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# Flash unlock keys
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FLASH_UNLOCK_KEY1 = 0x45670123
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FLASH_UNLOCK_KEY2 = 0xCDEF89AB
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# Option byte unlock keys
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FLASH_UNLOCK_OPTKEY1 = 0x08192A3B
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FLASH_UNLOCK_OPTKEY2 = 0x4C5D6E7F
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# Flash control register
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FLASH_CR = Register32(
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FLASH_BASE + 0x14,
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[
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RegisterBitDefinition("PG", 0, 1),
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RegisterBitDefinition("PER", 1, 1),
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RegisterBitDefinition("MER", 2, 1),
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RegisterBitDefinition("PNB", 3, 8),
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RegisterBitDefinition("_", 11, 5),
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RegisterBitDefinition("STRT", 16, 1),
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RegisterBitDefinition("OPT_STRT", 17, 1),
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RegisterBitDefinition("FSTPG", 18, 1),
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RegisterBitDefinition("_", 19, 5),
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RegisterBitDefinition("EOPIE", 24, 1),
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RegisterBitDefinition("ERRIE", 25, 1),
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RegisterBitDefinition("RD_ERRIE", 26, 1),
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RegisterBitDefinition("OBL_LAUNCH", 27, 1),
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RegisterBitDefinition("_", 28, 2),
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RegisterBitDefinition("OPT_LOCK", 30, 1),
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RegisterBitDefinition("LOCK", 31, 1),
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],
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)
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# Flash status register
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FLASH_SR = Register32(
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FLASH_BASE + 0x10,
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[
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RegisterBitDefinition("EOP", 0, 1),
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RegisterBitDefinition("OP_ERR", 1, 1),
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RegisterBitDefinition("_", 2, 1),
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RegisterBitDefinition("PROG_ERR", 3, 1),
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RegisterBitDefinition("WRP_ERR", 4, 1),
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RegisterBitDefinition("PGA_ERR", 5, 1),
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RegisterBitDefinition("SIZE_ERR", 6, 1),
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RegisterBitDefinition("PGS_ERR", 7, 1),
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RegisterBitDefinition("MISS_ERR", 8, 1),
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RegisterBitDefinition("FAST_ERR", 9, 1),
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RegisterBitDefinition("_", 10, 3),
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RegisterBitDefinition("OPTNV", 13, 1),
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RegisterBitDefinition("RD_ERR", 14, 1),
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RegisterBitDefinition("OPTV_ERR", 15, 1),
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RegisterBitDefinition("BSY", 16, 1),
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RegisterBitDefinition("_", 17, 1),
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RegisterBitDefinition("CFGBSY", 18, 1),
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RegisterBitDefinition("PESD", 19, 1),
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RegisterBitDefinition("_", 20, 12),
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],
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)
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# Option byte registers
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FLASH_OPTR = FLASH_BASE + 0x20
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FLASH_PCROP1ASR = FLASH_BASE + 0x24
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FLASH_PCROP1AER = FLASH_BASE + 0x28
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FLASH_WRP1AR = FLASH_BASE + 0x2C
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FLASH_WRP1BR = FLASH_BASE + 0x30
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FLASH_PCROP1BSR = FLASH_BASE + 0x34
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FLASH_PCROP1BER = FLASH_BASE + 0x38
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FLASH_IPCCBR = FLASH_BASE + 0x3C
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# Map option byte dword index to register address
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OPTION_BYTE_MAP_TO_REGS = {
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0: FLASH_OPTR,
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1: FLASH_PCROP1ASR,
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2: FLASH_PCROP1AER,
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3: FLASH_WRP1AR,
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4: FLASH_WRP1BR,
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5: FLASH_PCROP1BSR,
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6: FLASH_PCROP1BER,
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7: None, # Invalid Options
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8: None, # Invalid Options
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9: None, # Invalid Options
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10: None, # Invalid Options
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11: None, # Invalid Options
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12: None, # Invalid Options
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13: FLASH_IPCCBR,
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14: None, # Secure Flash
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15: None, # Core 2 Options
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}
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def __init__(self):
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self.logger = logging.getLogger("STM32WB55")
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class RunMode(Enum):
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Init = "init"
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Run = "run"
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Halt = "halt"
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def reset(self, oocd: OpenOCD, mode: RunMode):
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self.logger.debug("Resetting device")
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oocd.send_tcl(f"reset {mode.value}")
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def clear_flash_errors(self, oocd: OpenOCD):
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# Errata 2.2.9: Flash OPTVERR flag is always set after system reset
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# And also clear all other flash error flags
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self.logger.debug("Resetting flash errors")
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self.FLASH_SR.load(oocd)
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self.FLASH_SR.OP_ERR = 1
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self.FLASH_SR.PROG_ERR = 1
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self.FLASH_SR.WRP_ERR = 1
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self.FLASH_SR.PGA_ERR = 1
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self.FLASH_SR.SIZE_ERR = 1
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self.FLASH_SR.PGS_ERR = 1
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self.FLASH_SR.MISS_ERR = 1
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self.FLASH_SR.FAST_ERR = 1
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self.FLASH_SR.RD_ERR = 1
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self.FLASH_SR.OPTV_ERR = 1
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self.FLASH_SR.store(oocd)
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def flash_unlock(self, oocd: OpenOCD):
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# Check if flash is already unlocked
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self.FLASH_CR.load(oocd)
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if self.FLASH_CR.LOCK == 0:
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self.logger.debug("Flash is already unlocked")
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return
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# Unlock flash
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self.logger.debug("Unlocking Flash")
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oocd.write_32(self.FLASH_KEYR, self.FLASH_UNLOCK_KEY1)
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oocd.write_32(self.FLASH_KEYR, self.FLASH_UNLOCK_KEY2)
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# Check if flash is unlocked
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self.FLASH_CR.load(oocd)
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if self.FLASH_CR.LOCK == 0:
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self.logger.debug("Flash unlocked")
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else:
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self.logger.error("Flash unlock failed")
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raise Exception("Flash unlock failed")
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def option_bytes_unlock(self, oocd: OpenOCD):
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# Check if options is already unlocked
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self.FLASH_CR.load(oocd)
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if self.FLASH_CR.OPT_LOCK == 0:
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self.logger.debug("Options is already unlocked")
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return
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# Unlock options
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self.logger.debug("Unlocking Options")
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oocd.write_32(self.FLASH_OPTKEYR, self.FLASH_UNLOCK_OPTKEY1)
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oocd.write_32(self.FLASH_OPTKEYR, self.FLASH_UNLOCK_OPTKEY2)
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# Check if options is unlocked
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self.FLASH_CR.load(oocd)
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if self.FLASH_CR.OPT_LOCK == 0:
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self.logger.debug("Options unlocked")
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else:
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self.logger.error("Options unlock failed")
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raise Exception("Options unlock failed")
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def option_bytes_lock(self, oocd: OpenOCD):
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# Check if options is already locked
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self.FLASH_CR.load(oocd)
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if self.FLASH_CR.OPT_LOCK == 1:
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self.logger.debug("Options is already locked")
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return
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# Lock options
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self.logger.debug("Locking Options")
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self.FLASH_CR.OPT_LOCK = 1
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self.FLASH_CR.store(oocd)
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# Check if options is locked
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self.FLASH_CR.load(oocd)
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if self.FLASH_CR.OPT_LOCK == 1:
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self.logger.debug("Options locked")
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else:
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self.logger.error("Options lock failed")
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raise Exception("Options lock failed")
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def flash_lock(self, oocd: OpenOCD):
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# Check if flash is already locked
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self.FLASH_CR.load(oocd)
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if self.FLASH_CR.LOCK == 1:
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self.logger.debug("Flash is already locked")
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return
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# Lock flash
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self.logger.debug("Locking Flash")
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self.FLASH_CR.LOCK = 1
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self.FLASH_CR.store(oocd)
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# Check if flash is locked
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self.FLASH_CR.load(oocd)
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if self.FLASH_CR.LOCK == 1:
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self.logger.debug("Flash locked")
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else:
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self.logger.error("Flash lock failed")
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raise Exception("Flash lock failed")
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def option_bytes_apply(self, oocd: OpenOCD):
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self.logger.debug("Applying Option Bytes")
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self.FLASH_CR.load(oocd)
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self.FLASH_CR.OPT_STRT = 1
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self.FLASH_CR.store(oocd)
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# Wait for Option Bytes to be applied
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self.flash_wait_for_operation(oocd)
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def option_bytes_load(self, oocd: OpenOCD):
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self.logger.debug("Loading Option Bytes")
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self.FLASH_CR.load(oocd)
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self.FLASH_CR.OBL_LAUNCH = 1
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self.FLASH_CR.store(oocd)
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def option_bytes_id_to_address(self, id: int) -> int:
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# Check if this option byte (dword) is mapped to a register
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device_reg_addr = self.OPTION_BYTE_MAP_TO_REGS.get(id, None)
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if device_reg_addr is None:
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raise Exception(f"Option Byte {id} is not mapped to a register")
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return device_reg_addr
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def flash_wait_for_operation(self, oocd: OpenOCD):
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# Wait for flash operation to complete
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# TODO: timeout
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while True:
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self.FLASH_SR.load(oocd)
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if self.FLASH_SR.BSY == 0:
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break
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def flash_dump_status_register(self, oocd: OpenOCD):
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self.FLASH_SR.load(oocd)
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self.logger.info(f"FLASH_SR: {self.FLASH_SR.get():08x}")
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if self.FLASH_SR.EOP:
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self.logger.info(" End of operation")
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if self.FLASH_SR.OP_ERR:
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self.logger.error(" Operation error")
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if self.FLASH_SR.PROG_ERR:
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self.logger.error(" Programming error")
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if self.FLASH_SR.WRP_ERR:
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self.logger.error(" Write protection error")
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if self.FLASH_SR.PGA_ERR:
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self.logger.error(" Programming alignment error")
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if self.FLASH_SR.SIZE_ERR:
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self.logger.error(" Size error")
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if self.FLASH_SR.PGS_ERR:
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self.logger.error(" Programming sequence error")
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if self.FLASH_SR.MISS_ERR:
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self.logger.error(" Fast programming data miss error")
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if self.FLASH_SR.FAST_ERR:
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self.logger.error(" Fast programming error")
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if self.FLASH_SR.OPTNV:
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self.logger.info(" User option OPTVAL indication")
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if self.FLASH_SR.RD_ERR:
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self.logger.info(" PCROP read error")
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if self.FLASH_SR.OPTV_ERR:
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self.logger.info(" Option and Engineering bits loading validity error")
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if self.FLASH_SR.BSY:
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self.logger.info(" Busy")
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if self.FLASH_SR.CFGBSY:
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self.logger.info(" Programming or erase configuration busy")
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if self.FLASH_SR.PESD:
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self.logger.info(" Programming / erase operation suspended.")
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def write_flash_64(self, oocd: OpenOCD, address: int, word_1: int, word_2: int):
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self.logger.debug(f"Writing flash at address {address:08x}")
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if address % 8 != 0:
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self.logger.error("Address must be aligned to 8 bytes")
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raise Exception("Address must be aligned to 8 bytes")
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if word_1 == oocd.read_32(address) and word_2 == oocd.read_32(address + 4):
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self.logger.debug("Data is already programmed")
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return
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self.flash_unlock(oocd)
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# Check that no flash main memory operation is ongoing by checking the BSY bit
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self.FLASH_SR.load(oocd)
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if self.FLASH_SR.BSY:
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self.logger.error("Flash is busy")
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self.flash_dump_status_register(oocd)
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raise Exception("Flash is busy")
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# Enable end of operation interrupts and error interrupts
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self.FLASH_CR.load(oocd)
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self.FLASH_CR.EOPIE = 1
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self.FLASH_CR.ERRIE = 1
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self.FLASH_CR.store(oocd)
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# Check that flash memory program and erase operations are allowed
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if self.FLASH_SR.PESD:
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self.logger.error("Flash operations are not allowed")
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self.flash_dump_status_register(oocd)
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raise Exception("Flash operations are not allowed")
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# Check and clear all error programming flags due to a previous programming.
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self.clear_flash_errors(oocd)
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# Set the PG bit in the Flash memory control register (FLASH_CR)
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self.FLASH_CR.load(oocd)
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self.FLASH_CR.PG = 1
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self.FLASH_CR.store(oocd)
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# Perform the data write operation at the desired memory address, only double word (64 bits) can be programmed.
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# Write the first word
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oocd.send_tcl(f"mww 0x{address:08x} 0x{word_1:08x}")
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# Write the second word
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oocd.send_tcl(f"mww 0x{(address + 4):08x} 0x{word_2:08x}")
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# Wait for the BSY bit to be cleared
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self.flash_wait_for_operation(oocd)
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# Check that EOP flag is set in the FLASH_SR register
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self.FLASH_SR.load(oocd)
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if not self.FLASH_SR.EOP:
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self.logger.error("Flash operation failed")
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self.flash_dump_status_register(oocd)
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raise Exception("Flash operation failed")
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# Clear the EOP flag
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self.FLASH_SR.load(oocd)
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self.FLASH_SR.EOP = 1
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self.FLASH_SR.store(oocd)
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# Clear the PG bit in the FLASH_CR register
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self.FLASH_CR.load(oocd)
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self.FLASH_CR.PG = 0
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self.FLASH_CR.store(oocd)
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self.flash_lock(oocd)
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