mirror of
https://github.com/DarkFlippers/unleashed-firmware.git
synced 2024-12-17 18:31:36 +03:00
01434265f6
* Disable USART in sleep * Restore UART state on suspend/resume * FuriHal: Enable stop mode and add insomnia to I2C and SPI * Remove IDLE interrupt * FuriHal: add FPU isr and disable all FPU interrupt, add core2 stop mode configuration on deep sleep * FuriHal: tie stop mode debug with debug rtc flag * FuriHal: adjust flash latency on clock switch, tie mcu debug with RTC debug flag * FuriHal: move resource init to early stage * Add EXTI pending check, enable debug traps with compile-time flag * Wrap sleep debug functions in conditional compilation * Remove erroneous changed * Do not use CSS, remove it from everywhere * Enable/disable USB on VBUS connect (prototype) * FuriHal: add LPMS and DEEPSLEEP magic, workaround state inconsistency between cores * FuriHal: honor c1 LMPS * USB mode switch fix * Applications: add flags and insomnia bypass system * Correct spelling * FuriHal: cleanup insomnia usage, reset sleep flags on wakeup, add shutdown api * FuriHal: extra check on reinit request * FuriHal: rename gpio_display_rst pin to gpio_display_rst_n * FuriHal: add debug HAL * FuriHal: add some magic to core2 reload procedure, fix issue with crash on ble keyboard exit * FuriHal: cleanup ble glue, add BLE_GLUE_DEBUG flag * FuriHal: ble reinit API, move os timer to LPTIM1 for deep sleep capability, shutdown that works * FuriHal: take insomnia while shutdown * Remove USB switch on/off on VBUS change * Better tick skew handling * Improve tick consistency under load * Add USB_HP dummy IRQ handler * Move interrupt check closer to sleep * Clean up includes * Re-enable Insomnia globally * FuriHal: enable CSS * FuriHal: remove questionable core2 clock shenanigans * FuriHal: use core1 RCC registers in idle timer config * FuriHal: return back CSS handlers, add lptim isr dispatching Co-authored-by: Aleksandr Kutuzov <alleteam@gmail.com> Co-authored-by: nminaylov <nm29719@gmail.com>
58 lines
1.9 KiB
C
58 lines
1.9 KiB
C
#pragma once
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#include <stm32wbxx_ll_lptim.h>
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#include <stm32wbxx_ll_bus.h>
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#include <stm32wbxx_ll_rcc.h>
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#include <stdint.h>
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// Timer used for tickless idle
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#define FURI_HAL_IDLE_TIMER_MAX 0xFFFF
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#define FURI_HAL_IDLE_TIMER LPTIM1
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#define FURI_HAL_IDLE_TIMER_IRQ LPTIM1_IRQn
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static inline void furi_hal_idle_timer_init() {
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// Configure clock source
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LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE_LSE);
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// There is a theoretical possibility that we need it
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LL_APB1_GRP1_EnableClockSleep(LL_APB1_GRP1_PERIPH_LPTIM1);
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// Set interrupt priority and enable them
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NVIC_SetPriority(
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FURI_HAL_IDLE_TIMER_IRQ, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 15, 0));
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NVIC_EnableIRQ(FURI_HAL_IDLE_TIMER_IRQ);
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}
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static inline void furi_hal_idle_timer_start(uint32_t count) {
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count--;
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// Enable timer
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LL_LPTIM_Enable(FURI_HAL_IDLE_TIMER);
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while(!LL_LPTIM_IsEnabled(FURI_HAL_IDLE_TIMER))
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;
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// Enable compare match interrupt
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LL_LPTIM_EnableIT_CMPM(FURI_HAL_IDLE_TIMER);
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// Set compare, autoreload and start counter
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// Include some marging to workaround ARRM behaviour
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LL_LPTIM_SetCompare(FURI_HAL_IDLE_TIMER, count - 3);
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LL_LPTIM_SetAutoReload(FURI_HAL_IDLE_TIMER, count);
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LL_LPTIM_StartCounter(FURI_HAL_IDLE_TIMER, LL_LPTIM_OPERATING_MODE_ONESHOT);
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}
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static inline void furi_hal_idle_timer_reset() {
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// Hard reset timer
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// THE ONLY RELIABLE WAY to stop it according to errata
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LL_LPTIM_DeInit(FURI_HAL_IDLE_TIMER);
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// Prevent IRQ handler call
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NVIC_ClearPendingIRQ(FURI_HAL_IDLE_TIMER_IRQ);
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}
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static inline uint32_t furi_hal_idle_timer_get_cnt() {
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uint32_t counter = LL_LPTIM_GetCounter(FURI_HAL_IDLE_TIMER);
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uint32_t counter_shadow = LL_LPTIM_GetCounter(FURI_HAL_IDLE_TIMER);
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while(counter != counter_shadow) {
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counter = counter_shadow;
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counter_shadow = LL_LPTIM_GetCounter(FURI_HAL_IDLE_TIMER);
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}
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return counter;
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}
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