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Fix a bug where arch-specific statements weren't incrementing the IP
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@ -25,7 +25,9 @@ module Data.Macaw.PPC.Arch (
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import GHC.TypeLits
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import Control.Lens ( (^.) )
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import qualified Text.PrettyPrint.ANSI.Leijen as PP
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import Data.Parameterized.Classes ( knownRepr )
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import qualified Data.Parameterized.NatRepr as NR
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import qualified Data.Parameterized.TraversableFC as FC
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import qualified Data.Parameterized.TraversableF as TF
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@ -404,6 +406,13 @@ memrrToEffectiveAddress memrr = do
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b <- G.addExpr (G.AppExpr (MC.Mux (MT.BVTypeRepr repr) isr0 zero base))
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G.addExpr (G.AppExpr (MC.BVAdd repr b offset))
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incrementIP :: (PPCArchConstraints ppc) => G.Generator ppc ids s ()
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incrementIP = do
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rs <- G.getRegs
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let ipVal = rs ^. MC.boundValue PPC_IP
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e <- G.addExpr (G.AppExpr (MC.BVAdd knownRepr ipVal (MC.BVValue knownRepr 0x4)))
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G.setRegVal PPC_IP e
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-- | Manually-provided semantics for instructions whose full semantics cannot be
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-- expressed in our semantics format.
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--
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@ -413,50 +422,68 @@ memrrToEffectiveAddress memrr = do
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ppcInstructionMatcher :: (PPCArchConstraints ppc) => D.Instruction -> Maybe (G.Generator ppc ids s ())
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ppcInstructionMatcher (D.Instruction opc operands) =
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case opc of
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D.SC -> Just (G.finishWithTerminator (MC.ArchTermStmt PPCSyscall))
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D.TRAP -> Just (G.finishWithTerminator (MC.ArchTermStmt PPCTrap))
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D.ATTN -> Just (G.addStmt (MC.ExecArchStmt Attn))
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D.SYNC -> Just (G.addStmt (MC.ExecArchStmt Sync))
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D.ISYNC -> Just (G.addStmt (MC.ExecArchStmt Isync))
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D.SC -> Just $ do
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incrementIP
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G.finishWithTerminator (MC.ArchTermStmt PPCSyscall)
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D.TRAP -> Just $ do
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incrementIP
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G.finishWithTerminator (MC.ArchTermStmt PPCTrap)
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D.ATTN -> Just $ do
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incrementIP
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G.addStmt (MC.ExecArchStmt Attn)
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D.SYNC -> Just $ do
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incrementIP
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G.addStmt (MC.ExecArchStmt Sync)
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D.ISYNC -> Just $ do
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incrementIP
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G.addStmt (MC.ExecArchStmt Isync)
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D.DCBA ->
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case operands of
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D.Memrr memrr D.:< D.Nil -> Just $ do
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incrementIP
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ea <- memrrToEffectiveAddress memrr
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G.addStmt (MC.ExecArchStmt (Dcba ea))
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D.DCBF ->
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case operands of
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D.Memrr memrr D.:< D.Nil -> Just $ do
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incrementIP
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ea <- memrrToEffectiveAddress memrr
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G.addStmt (MC.ExecArchStmt (Dcbf ea))
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D.DCBI ->
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case operands of
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D.Memrr memrr D.:< D.Nil -> Just $ do
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incrementIP
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ea <- memrrToEffectiveAddress memrr
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G.addStmt (MC.ExecArchStmt (Dcbi ea))
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D.DCBST ->
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case operands of
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D.Memrr memrr D.:< D.Nil -> Just $ do
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incrementIP
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ea <- memrrToEffectiveAddress memrr
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G.addStmt (MC.ExecArchStmt (Dcbst ea))
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D.DCBZ ->
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case operands of
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D.Memrr memrr D.:< D.Nil -> Just $ do
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incrementIP
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ea <- memrrToEffectiveAddress memrr
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G.addStmt (MC.ExecArchStmt (Dcbz ea))
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D.DCBZL ->
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case operands of
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D.Memrr memrr D.:< D.Nil -> Just $ do
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incrementIP
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ea <- memrrToEffectiveAddress memrr
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G.addStmt (MC.ExecArchStmt (Dcbzl ea))
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D.DCBT ->
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case operands of
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D.Memrr memrr D.:< D.U5imm imm D.:< D.Nil -> Just $ do
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incrementIP
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ea <- memrrToEffectiveAddress memrr
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th <- O.extractValue imm
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G.addStmt (MC.ExecArchStmt (Dcbt ea th))
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D.DCBTST ->
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case operands of
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D.Memrr memrr D.:< D.U5imm imm D.:< D.Nil -> Just $ do
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incrementIP
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ea <- memrrToEffectiveAddress memrr
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th <- O.extractValue imm
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G.addStmt (MC.ExecArchStmt (Dcbtst ea th))
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