diff --git a/macaw-arm/src/Data/Macaw/ARM/Semantics/ARMSemantics.hs b/macaw-arm/src/Data/Macaw/ARM/Semantics/ARMSemantics.hs index eefce4c1..fad293f4 100644 --- a/macaw-arm/src/Data/Macaw/ARM/Semantics/ARMSemantics.hs +++ b/macaw-arm/src/Data/Macaw/ARM/Semantics/ARMSemantics.hs @@ -21,7 +21,7 @@ import qualified Data.Macaw.Types as MT import Data.Proxy ( Proxy(..) ) import Dismantle.ARM -- must be present to supply definitions for genExecInstruction output import qualified SemMC.Architecture.AArch32 as ARMSem -import SemMC.Architecture.ARM.Opcodes ( allA32Semantics, allA32OpcodeInfo ) +import SemMC.Architecture.ARM.Opcodes ( allA32Semantics, allA32OpcodeInfo, a32DefinedFunctions ) execInstruction :: MC.Value ARMSem.AArch32 ids (MT.BVType 32) @@ -34,5 +34,6 @@ execInstruction = $(genExecInstructionLogStdErr (Proxy @ARMSem.AArch32) 'a32InstructionMatcher allA32Semantics allA32OpcodeInfo + a32DefinedFunctions ([t| Dismantle.ARM.Operand |], [t| ARMSem.AArch32 |]) ) diff --git a/macaw-arm/src/Data/Macaw/ARM/Semantics/TH.hs b/macaw-arm/src/Data/Macaw/ARM/Semantics/TH.hs index af7c197d..fb6d6f9b 100644 --- a/macaw-arm/src/Data/Macaw/ARM/Semantics/TH.hs +++ b/macaw-arm/src/Data/Macaw/ARM/Semantics/TH.hs @@ -62,7 +62,7 @@ armNonceAppEval bvi nonceApp = S.FnApp symFn args -> let nm = symFnName symFn in case nm of - "arm_is_r15" -> return $ + "uf_arm_is_r15" -> return $ -- This requires special handling because this can -- be checking actual GPR locations or the results -- of an expression extracting a register number diff --git a/macaw-arm/src/Data/Macaw/ARM/Semantics/ThumbSemantics.hs b/macaw-arm/src/Data/Macaw/ARM/Semantics/ThumbSemantics.hs index 342e4ef1..1cad6d88 100644 --- a/macaw-arm/src/Data/Macaw/ARM/Semantics/ThumbSemantics.hs +++ b/macaw-arm/src/Data/Macaw/ARM/Semantics/ThumbSemantics.hs @@ -21,7 +21,7 @@ import qualified Data.Macaw.Types as MT import Data.Proxy ( Proxy(..) ) import Dismantle.Thumb -- as ThumbDis -- must be present to supply definitions for genExecInstruction output import qualified SemMC.Architecture.AArch32 as ARMSem -import SemMC.Architecture.ARM.Opcodes ( allT32Semantics, allT32OpcodeInfo ) +import SemMC.Architecture.ARM.Opcodes ( allT32Semantics, allT32OpcodeInfo, t32DefinedFunctions ) execInstruction :: MC.Value ARMSem.AArch32 ids (MT.BVType 32) @@ -34,5 +34,6 @@ execInstruction = $(genExecInstructionLogStdErr (Proxy @ARMSem.AArch32) 't32InstructionMatcher allT32Semantics allT32OpcodeInfo + t32DefinedFunctions ([t| Dismantle.Thumb.Operand |], [t| ARMSem.AArch32 |]) )