Expected {expBinaryName = "tests/samples/switching.x86.exe", expEntryPoints = [EntryPoint (Address {addrSegmentBase = 0, addrSegmentOffset = 4194304, addrSegoffOffset = 468, addrPretty = "0x4001d4"}),EntryPoint (Address {addrSegmentBase = 0, addrSegmentOffset = 4194304, addrSegoffOffset = 351, addrPretty = "0x40015f"}),EntryPoint (Address {addrSegmentBase = 0, addrSegmentOffset = 4194304, addrSegoffOffset = 468, addrPretty = "0x4001d4"}),EntryPoint (Address {addrSegmentBase = 0, addrSegmentOffset = 4194304, addrSegoffOffset = 344, addrPretty = "0x400158"})], expFunctions = [Function (Address {addrSegmentBase = 0, addrSegmentOffset = 4194304, addrSegoffOffset = 344, addrPretty = "0x400158"}) [Block (Address {addrSegmentBase = 0, addrSegmentOffset = 4194304, addrSegoffOffset = 344, addrPretty = "0x400158"}) "StatementList {stmtsIdent = 0, stmtsNonterm = [# 0x0 push   rbp,r4 := (bv_add rsp_0 (0xfffffffffffffff8 :: [64])),write_mem r4 rbp_0,# 0x400158: {rip => 0x400159\n            ;rsp => r4},# 0x1 mov    rbp,rsp,# 0x400159: {rip => 0x40015c\n            ;rbp => r4},# 0x4 nop,# 0x40015c: {rip => 0x40015d},# 0x5 pop    rbp,r5 := read_mem r4 (bvle 8),# 0x40015d: {rip => 0x40015e\n            ;rsp => rsp_0\n            ;rbp => r5},# 0x6 ret,r6 := read_mem rsp_0 (bvle 8),r7 := (bv_add rsp_0 (0x8 :: [64])),# 0x40015e: {rip => r6\n            ;rsp => r7}], stmtsTerm = return\n  { rip = r6\n  , rsp = r7\n  , rbp = r5\n  , df = false\n  , x87top = 0x7 :: [3]\n  }, stmtsAbsState = registers:\n  { rip = code {0x400158}\n  , rsp = {rsp_0x400158 + 0}\n  , df = False\n  , x87top = finset {7}\n  }\nstack:\n  0x0 := return_addr}"],Function (Address {addrSegmentBase = 0, addrSegmentOffset = 4194304, addrSegoffOffset = 351, addrPretty = "0x40015f"}) [Block (Address {addrSegmentBase = 0, addrSegmentOffset = 4194304, addrSegoffOffset = 351, addrPretty = "0x40015f"}) "StatementList {stmtsIdent = 0, stmtsNonterm = [# 0x0 push   rbp,r15 := (bv_add rsp_0 (0xfffffffffffffff8 :: [64])),write_mem r15 rbp_0,# 0x40015f: {rip => 0x400160\n            ;rsp => r15},# 0x1 mov    rbp,rsp,# 0x400160: {rip => 0x400163\n            ;rbp => r15},# 0x4 mov    QWORD PTR [rbp-0x8],rdi,r16 := (bv_add rsp_0 (0xfffffffffffffff0 :: [64])),write_mem r16 rdi_0,# 0x400163: {rip => 0x400167},# 0x8 mov    QWORD PTR [rbp-0x10],rsi,r17 := (bv_add rsp_0 (0xffffffffffffffe8 :: [64])),write_mem r17 rsi_0,# 0x400167: {rip => 0x40016b},# 0xc cmp    QWORD PTR [rbp-0x8],0x5,r18 := read_mem r16 (bvle 8),r19 := (ssbb_overflows r18 (0x5 :: [64]) false),r20 := (trunc r18 4),r21 := (bv_ult r20 (0x5 :: [4])),r22 := (bv_ult r18 (0x5 :: [64])),r23 := (bv_add r18 (0xfffffffffffffffb :: [64])),r24 := (bv_slt r23 (0x0 :: [64])),r25 := (eq r18 (0x5 :: [64])),r26 := (trunc r23 8),r27 := (even_parity r26),# 0x40016b: {rip => 0x400170\n            ;cf => r22\n            ;pf => r27\n            ;af => r21\n            ;zf => r25\n            ;sf => r24\n            ;of => r19},# 0x11 ja     pc+5b,r28 := (bv_ult (0x5 :: [64]) r18),r29 := (mux r28 (0x4001cd) (0x400172)),# 0x400170: {rip => r29}], stmtsTerm = ite r28\n{\n  \n  jump 0x4001cd\n    { rip = 0x4001cd\n    , rsp = r15\n    , rbp = r15\n    , cf = r22\n    , pf = r27\n    , af = r21\n    , zf = r25\n    , sf = r24\n    , df = false\n    , of = r19\n    , x87top = 0x7 :: [3]\n    }\n}\n{\n  \n  jump 0x400172\n    { rip = 0x400172\n    , rsp = r15\n    , rbp = r15\n    , cf = r22\n    , pf = r27\n    , af = r21\n    , zf = r25\n    , sf = r24\n    , df = false\n    , of = r19\n    , x87top = 0x7 :: [3]\n    }\n}, stmtsAbsState = registers:\n  { rip = code {0x40015f}\n  , rsp = {rsp_0x40015f + 0}\n  , df = False\n  , x87top = finset {7}\n  }\nstack:\n  0x0 := return_addr}",Block (Address {addrSegmentBase = 0, addrSegmentOffset = 4194304, addrSegoffOffset = 370, addrPretty = "0x400172"}) "StatementList {stmtsIdent = 0, stmtsNonterm = [# 0x0 mov    rax,QWORD PTR [rbp-0x8],r47 := (bv_add rbp_0 (0xfffffffffffffff8 :: [64])),r48 := read_mem r47 (bvle 8),# 0x400172: {rip => 0x400176\n            ;rax => r48},# 0x4 lea    rdx,[rax*4],r49 := (bv_mul (0x4 :: [64]) r48),# 0x400176: {rip => 0x40017e\n            ;rdx => r49},# 0xc lea    rax,[rip0x6f],# 0x40017e: {rip => 0x400185\n            ;rax => 0x4001f4},# 0x13 mov    eax,DWORD PTR [rdx+rax*1],r50 := (bv_add r49 (0x4001f4)),r51 := read_mem r50 (bvle 4),r52 := (uext r51 64),# 0x400185: {rip => 0x400188\n            ;rax => r52},# 0x16 movsxd rdx,eax,r53 := (sext r51 64),# 0x400188: {rip => 0x40018b\n            ;rdx => r53},# 0x19 lea    rax,[rip0x62],# 0x40018b: {rip => 0x400192\n            ;rax => 0x4001f4},# 0x20 add    rax,rdx,r54 := (sadc_overflows (0x4001f4) r53 false),r55 := (trunc (0x4001f4) 4),r56 := (trunc r51 4),r57 := (uadc_overflows r55 r56 false),r58 := (uadc_overflows (0x4001f4) r53 false),r59 := (bv_add (0x4001f4) r53),r60 := (bv_slt r59 (0x0 :: [64])),r61 := (eq r59 (0x0 :: [64])),r62 := (trunc r59 8),r63 := (even_parity r62),# 0x400192: {rip => 0x400195\n            ;rax => r59\n            ;cf => r58\n            ;pf => r63\n            ;af => r57\n            ;zf => r61\n            ;sf => r60\n            ;of => r54},# 0x23 jmp    rax,# 0x400195: {rip => r59}], stmtsTerm = unknown transfer\n  { rip = r59\n  , rax = r59\n  , rdx = r53\n  , cf = r58\n  , pf = r63\n  , af = r57\n  , zf = r61\n  , sf = r60\n  , df = false\n  , of = r54\n  , x87top = 0x7 :: [3]\n  }, stmtsAbsState = registers:\n  { rip = code {0x400172}\n  , rsp = {rsp_0x40015f - 8}\n  , rbp = {rsp_0x40015f - 8}\n  , df = False\n  , x87top = finset {7}\n  }\nstack:\n  0x0 := return_addr}",Block (Address {addrSegmentBase = 0, addrSegmentOffset = 4194304, addrSegoffOffset = 461, addrPretty = "0x4001cd"}) "StatementList {stmtsIdent = 0, stmtsNonterm = [# 0x0 mov    eax,0x0,# 0x4001cd: {rip => 0x4001d2\n            ;rax => 0x0 :: [64]},# 0x5 pop    rbp,r68 := read_mem rsp_0 (bvle 8),r69 := (bv_add rsp_0 (0x8 :: [64])),# 0x4001d2: {rip => 0x4001d3\n            ;rsp => r69\n            ;rbp => r68},# 0x6 ret,r70 := read_mem r69 (bvle 8),r71 := (bv_add rsp_0 (0x10 :: [64])),# 0x4001d3: {rip => r70\n            ;rsp => r71}], stmtsTerm = return\n  { rip = r70\n  , rax = 0x0 :: [64]\n  , rsp = r71\n  , rbp = r68\n  , df = false\n  , x87top = 0x7 :: [3]\n  }, stmtsAbsState = registers:\n  { rip = code {0x4001cd}\n  , rsp = {rsp_0x40015f - 8}\n  , rbp = {rsp_0x40015f - 8}\n  , df = False\n  , x87top = finset {7}\n  }\nstack:\n  0x0 := return_addr}"],Function (Address {addrSegmentBase = 0, addrSegmentOffset = 4194304, addrSegoffOffset = 468, addrPretty = "0x4001d4"}) [Block (Address {addrSegmentBase = 0, addrSegmentOffset = 4194304, addrSegoffOffset = 468, addrPretty = "0x4001d4"}) "StatementList {stmtsIdent = 0, stmtsNonterm = [# 0x0 push   rbp,r9 := (bv_add rsp_0 (0xfffffffffffffff8 :: [64])),write_mem r9 rbp_0,# 0x4001d4: {rip => 0x4001d5\n            ;rsp => r9},# 0x1 mov    rbp,rsp,# 0x4001d5: {rip => 0x4001d8\n            ;rbp => r9},# 0x4 sub    rsp,0x10,r10 := (ssbb_overflows r9 (0x10 :: [64]) false),r11 := (bv_ult r9 (0x10 :: [64])),r12 := (bv_add rsp_0 (0xffffffffffffffe8 :: [64])),r13 := (bv_slt r12 (0x0 :: [64])),r14 := (eq rsp_0 (0x18 :: [64])),r15 := (trunc r12 8),r16 := (even_parity r15),# 0x4001d8: {rip => 0x4001dc\n            ;rsp => r12\n            ;cf => r11\n            ;pf => r16\n            ;af => false\n            ;zf => r14\n            ;sf => r13\n            ;of => r10},# 0x8 mov    esi,0x4,# 0x4001dc: {rip => 0x4001e1\n            ;rsi => 0x4 :: [64]},# 0xd mov    edi,0x3,# 0x4001e1: {rip => 0x4001e6\n            ;rdi => 0x3 :: [64]},# 0x12 call   pc+-8c,r17 := (bv_add rsp_0 (0xffffffffffffffe0 :: [64])),write_mem r17 0x4001eb,# 0x4001e6: {rip => 0x40015f\n            ;rsp => r17}], stmtsTerm = call and return to 0x4001eb\n  { rip = 0x40015f\n  , rsp = r17\n  , rbp = r9\n  , rsi = 0x4 :: [64]\n  , rdi = 0x3 :: [64]\n  , cf = r11\n  , pf = r16\n  , af = false\n  , zf = r14\n  , sf = r13\n  , df = false\n  , of = r10\n  , x87top = 0x7 :: [3]\n  }, stmtsAbsState = registers:\n  { rip = code {0x4001d4}\n  , rsp = {rsp_0x4001d4 + 0}\n  , df = False\n  , x87top = finset {7}\n  }\nstack:\n  0x0 := return_addr\n  -0x20 := code {0x4001eb}}",Block (Address {addrSegmentBase = 0, addrSegmentOffset = 4194304, addrSegoffOffset = 491, addrPretty = "0x4001eb"}) "StatementList {stmtsIdent = 0, stmtsNonterm = [# 0x0 mov    QWORD PTR [rbp-0x8],rax,r23 := (bv_add rbp_0 (0xfffffffffffffff8 :: [64])),write_mem r23 rax_0,# 0x4001eb: {rip => 0x4001ef},# 0x4 nop,# 0x4001ef: {rip => 0x4001f0},# 0x5 leave,r24 := read_mem rbp_0 (bvle 8),r25 := (bv_add rbp_0 (0x8 :: [64])),# 0x4001f0: {rip => 0x4001f1\n            ;rsp => r25\n            ;rbp => r24},# 0x6 ret,r26 := read_mem r25 (bvle 8),r27 := (bv_add rbp_0 (0x10 :: [64])),# 0x4001f1: {rip => r26\n            ;rsp => r27}], stmtsTerm = return\n  { rip = r26\n  , rsp = r27\n  , rbp = r24\n  , df = false\n  , x87top = 0x7 :: [3]\n  }, stmtsAbsState = registers:\n  { rip = code {0x4001eb}\n  , rsp = {rsp_0x4001d4 - 18}\n  , rbp = {rsp_0x4001d4 - 8}\n  , df = False\n  , x87top = finset {7}\n  }\nstack:\n  0x0 := return_addr\n  -0x20 := code {0x4001eb}}"]]}