2018-10-18 00:13:55 +03:00
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#include "MemoryManager.h"
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#include <AK/Assertions.h>
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#include <AK/kstdio.h>
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#include <AK/kmalloc.h>
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#include "i386.h"
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#include "StdLib.h"
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2018-10-18 14:05:00 +03:00
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#include "Task.h"
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2018-10-18 00:13:55 +03:00
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static MemoryManager* s_the;
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MemoryManager& MemoryManager::the()
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{
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return *s_the;
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}
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MemoryManager::MemoryManager()
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{
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m_pageDirectory = (dword*)0x5000;
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m_pageTableZero = (dword*)0x6000;
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2018-10-18 14:05:00 +03:00
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m_pageTableOne = (dword*)0x7000;
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2018-10-18 00:13:55 +03:00
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initializePaging();
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}
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MemoryManager::~MemoryManager()
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{
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}
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void MemoryManager::initializePaging()
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{
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static_assert(sizeof(MemoryManager::PageDirectoryEntry) == 4);
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static_assert(sizeof(MemoryManager::PageTableEntry) == 4);
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memset(m_pageTableZero, 0, 4096);
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2018-10-18 14:05:00 +03:00
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memset(m_pageTableOne, 0, 4096);
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2018-10-18 00:13:55 +03:00
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memset(m_pageDirectory, 0, 4096);
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kprintf("MM: Page directory @ %p\n", m_pageDirectory);
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2018-10-18 14:05:00 +03:00
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kprintf("MM: Page table zero @ %p\n", m_pageTableZero);
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kprintf("MM: Page table one @ %p\n", m_pageTableOne);
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2018-10-21 22:57:59 +03:00
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// Make null dereferences crash.
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protectMap(LinearAddress(0), 4 * KB);
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identityMap(LinearAddress(4096), 4 * MB);
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2018-10-18 14:05:00 +03:00
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// Put pages between 4MB and 16MB in the page freelist.
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for (size_t i = (4 * MB) + 1024; i < (16 * MB); i += PAGE_SIZE) {
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m_freePages.append(PhysicalAddress(i));
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}
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2018-10-18 00:13:55 +03:00
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asm volatile("movl %%eax, %%cr3"::"a"(m_pageDirectory));
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asm volatile(
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"movl %cr0, %eax\n"
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"orl $0x80000001, %eax\n"
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"movl %eax, %cr0\n"
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);
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}
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auto MemoryManager::ensurePTE(LinearAddress linearAddress) -> PageTableEntry
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{
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ASSERT_INTERRUPTS_DISABLED();
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2018-10-18 00:13:55 +03:00
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dword pageDirectoryIndex = (linearAddress.get() >> 22) & 0x3ff;
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dword pageTableIndex = (linearAddress.get() >> 12) & 0x3ff;
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PageDirectoryEntry pde = PageDirectoryEntry(&m_pageDirectory[pageDirectoryIndex]);
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if (!pde.isPresent()) {
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kprintf("PDE %u !present, allocating\n", pageDirectoryIndex);
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if (pageDirectoryIndex == 0) {
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pde.setPageTableBase((dword)m_pageTableZero);
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pde.setUserAllowed(true);
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pde.setPresent(true);
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pde.setWritable(true);
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2018-10-18 14:05:00 +03:00
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} else if (pageDirectoryIndex == 1) {
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pde.setPageTableBase((dword)m_pageTableOne);
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2018-10-18 15:53:00 +03:00
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pde.setUserAllowed(true);
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2018-10-18 14:05:00 +03:00
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pde.setPresent(true);
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2018-10-18 15:53:00 +03:00
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pde.setWritable(true);
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2018-10-18 00:13:55 +03:00
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} else {
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// FIXME: We need an allocator!
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ASSERT_NOT_REACHED();
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}
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}
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return PageTableEntry(&pde.pageTableBase()[pageTableIndex]);
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}
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2018-10-21 22:57:59 +03:00
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void MemoryManager::protectMap(LinearAddress linearAddress, size_t length)
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{
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2018-10-25 11:15:28 +03:00
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InterruptDisabler disabler;
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2018-10-21 22:57:59 +03:00
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// FIXME: ASSERT(linearAddress is 4KB aligned);
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for (dword offset = 0; offset < length; offset += 4096) {
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auto pteAddress = linearAddress.offset(offset);
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auto pte = ensurePTE(pteAddress);
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pte.setPhysicalPageBase(pteAddress.get());
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pte.setUserAllowed(false);
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pte.setPresent(false);
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pte.setWritable(false);
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2018-10-23 16:53:11 +03:00
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flushTLB(pteAddress);
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2018-10-21 22:57:59 +03:00
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}
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}
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2018-10-18 00:13:55 +03:00
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void MemoryManager::identityMap(LinearAddress linearAddress, size_t length)
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{
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2018-10-25 11:15:28 +03:00
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InterruptDisabler disabler;
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2018-10-18 00:13:55 +03:00
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// FIXME: ASSERT(linearAddress is 4KB aligned);
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for (dword offset = 0; offset < length; offset += 4096) {
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auto pteAddress = linearAddress.offset(offset);
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auto pte = ensurePTE(pteAddress);
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pte.setPhysicalPageBase(pteAddress.get());
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pte.setUserAllowed(true);
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pte.setPresent(true);
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pte.setWritable(true);
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2018-10-23 16:53:11 +03:00
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flushTLB(pteAddress);
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2018-10-18 00:13:55 +03:00
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}
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}
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void MemoryManager::initialize()
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{
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s_the = new MemoryManager;
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}
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2018-10-18 14:05:00 +03:00
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PageFaultResponse MemoryManager::handlePageFault(const PageFault& fault)
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{
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2018-10-25 11:15:28 +03:00
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ASSERT_INTERRUPTS_DISABLED();
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kprintf("MM: handlePageFault(%w) at laddr=%p\n", fault.code(), fault.address().get());
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if (fault.isNotPresent()) {
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kprintf(" >> NP fault!\n");
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} else if (fault.isProtectionViolation()) {
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kprintf(" >> PV fault!\n");
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}
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return PageFaultResponse::ShouldCrash;
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}
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RetainPtr<Zone> MemoryManager::createZone(size_t size)
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{
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auto pages = allocatePhysicalPages(ceilDiv(size, PAGE_SIZE));
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if (pages.isEmpty()) {
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kprintf("MM: createZone: no physical pages for size %u", size);
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return nullptr;
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}
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return adopt(*new Zone(move(pages)));
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}
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Vector<PhysicalAddress> MemoryManager::allocatePhysicalPages(size_t count)
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{
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2018-10-25 11:15:28 +03:00
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InterruptDisabler disabler;
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2018-10-18 14:05:00 +03:00
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if (count > m_freePages.size())
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return { };
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Vector<PhysicalAddress> pages;
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pages.ensureCapacity(count);
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for (size_t i = 0; i < count; ++i)
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pages.append(m_freePages.takeLast());
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return pages;
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}
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byte* MemoryManager::quickMapOnePage(PhysicalAddress physicalAddress)
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{
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2018-10-25 11:15:28 +03:00
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ASSERT_INTERRUPTS_DISABLED();
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2018-10-18 14:05:00 +03:00
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auto pte = ensurePTE(LinearAddress(4 * MB));
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kprintf("quickmap %x @ %x {pte @ %p}\n", physicalAddress.get(), 4*MB, pte.ptr());
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pte.setPhysicalPageBase(physicalAddress.pageBase());
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pte.setPresent(true);
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pte.setWritable(true);
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2018-10-23 16:53:11 +03:00
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flushTLB(LinearAddress(4 * MB));
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2018-10-18 14:05:00 +03:00
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return (byte*)(4 * MB);
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}
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2018-10-23 16:53:11 +03:00
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void MemoryManager::flushEntireTLB()
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2018-10-23 12:03:56 +03:00
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{
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asm volatile(
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"mov %cr3, %eax\n"
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"mov %eax, %cr3\n"
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);
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}
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2018-10-23 16:53:11 +03:00
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void MemoryManager::flushTLB(LinearAddress laddr)
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{
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asm volatile("invlpg %0": :"m" (*(char*)laddr.get()));
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}
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2018-10-23 11:12:50 +03:00
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bool MemoryManager::unmapRegion(Task& task, Task::Region& region)
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{
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2018-10-25 11:15:28 +03:00
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InterruptDisabler disabler;
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2018-10-23 11:12:50 +03:00
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auto& zone = *region.zone;
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for (size_t i = 0; i < zone.m_pages.size(); ++i) {
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auto laddr = region.linearAddress.offset(i * PAGE_SIZE);
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auto pte = ensurePTE(laddr);
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pte.setPhysicalPageBase(0);
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pte.setPresent(false);
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pte.setWritable(false);
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pte.setUserAllowed(false);
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2018-10-23 16:53:11 +03:00
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flushTLB(laddr);
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2018-10-23 11:12:50 +03:00
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// kprintf("MM: >> Unmapped L%x => P%x <<\n", laddr, zone.m_pages[i].get());
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}
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return true;
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}
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2018-10-18 15:53:00 +03:00
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bool MemoryManager::unmapRegionsForTask(Task& task)
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{
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2018-10-25 11:15:28 +03:00
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ASSERT_INTERRUPTS_DISABLED();
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2018-10-23 11:12:50 +03:00
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for (auto& region : task.m_regions) {
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if (!unmapRegion(task, *region))
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return false;
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}
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2018-10-18 14:05:00 +03:00
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return true;
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}
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2018-10-22 16:42:39 +03:00
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bool MemoryManager::mapRegion(Task& task, Task::Region& region)
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{
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2018-10-25 11:15:28 +03:00
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InterruptDisabler disabler;
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2018-10-22 16:42:39 +03:00
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auto& zone = *region.zone;
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for (size_t i = 0; i < zone.m_pages.size(); ++i) {
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auto laddr = region.linearAddress.offset(i * PAGE_SIZE);
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auto pte = ensurePTE(laddr);
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pte.setPhysicalPageBase(zone.m_pages[i].get());
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pte.setPresent(true);
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pte.setWritable(true);
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pte.setUserAllowed(!task.isRing0());
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2018-10-23 16:53:11 +03:00
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flushTLB(laddr);
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2018-10-22 16:42:39 +03:00
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//kprintf("MM: >> Mapped L%x => P%x <<\n", laddr, zone.m_pages[i].get());
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}
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return true;
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}
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2018-10-18 15:53:00 +03:00
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bool MemoryManager::mapRegionsForTask(Task& task)
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{
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2018-10-25 11:15:28 +03:00
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ASSERT_INTERRUPTS_DISABLED();
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2018-10-18 15:53:00 +03:00
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for (auto& region : task.m_regions) {
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2018-10-22 16:42:39 +03:00
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if (!mapRegion(task, *region))
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return false;
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2018-10-18 14:05:00 +03:00
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}
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return true;
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}
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bool copyToZone(Zone& zone, const void* data, size_t size)
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{
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if (zone.size() < size) {
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kprintf("copyToZone: can't fit %u bytes into zone with size %u\n", size, zone.size());
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return false;
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}
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2018-10-25 11:15:28 +03:00
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InterruptDisabler disabler;
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2018-10-18 14:05:00 +03:00
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auto* dataptr = (const byte*)data;
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size_t remaining = size;
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for (size_t i = 0; i < zone.m_pages.size(); ++i) {
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byte* dest = MemoryManager::the().quickMapOnePage(zone.m_pages[i]);
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kprintf("memcpy(%p, %p, %u)\n", dest, dataptr, min(PAGE_SIZE, remaining));
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memcpy(dest, dataptr, min(PAGE_SIZE, remaining));
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dataptr += PAGE_SIZE;
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remaining -= PAGE_SIZE;
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}
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return true;
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}
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2018-10-18 00:13:55 +03:00
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