From 1a312f4265ec8918b4b24005c4ca02ef54e32b31 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?S=C3=B6nke=20Holz?= <sholz8530@gmail.com>
Date: Wed, 28 Feb 2024 15:54:26 +0100
Subject: [PATCH] Kernel/riscv64: Only enable interrupts in trap handler if
 they were on

Always enabling interrupts is in hindsight obviously a bug, as trapping
code that has interrupts disabled very likely expects that they stay
disabled.
---
 Kernel/Arch/riscv64/Interrupts.cpp | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Kernel/Arch/riscv64/Interrupts.cpp b/Kernel/Arch/riscv64/Interrupts.cpp
index babc7b091a6..96c25223034 100644
--- a/Kernel/Arch/riscv64/Interrupts.cpp
+++ b/Kernel/Arch/riscv64/Interrupts.cpp
@@ -60,7 +60,8 @@ extern "C" void trap_handler(TrapFrame& trap_frame)
         // Exception
 
         Processor::current().enter_trap(trap_frame, false);
-        Processor::enable_interrupts();
+        if (trap_frame.regs->sstatus.SPIE == 1)
+            Processor::enable_interrupts();
 
         using enum RISCV64::CSR::SCAUSE;
         switch (scause) {