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Kernel: Implement {enable,disable}_msi interrupts in PCI Device
Implement enabling and disabling MSI interrupts for a PCI device. Removes two more TODO()s from PCI::Device.cpp :^)
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parent
1bc2c5c110
commit
35a844ac75
Notes:
sideshowbarker
2024-07-17 05:06:13 +09:00
Author: https://github.com/Panky-codes Commit: https://github.com/SerenityOS/serenity/commit/35a844ac75 Pull-request: https://github.com/SerenityOS/serenity/pull/18732 Reviewed-by: https://github.com/gmta ✅ Reviewed-by: https://github.com/supercomputer7 ✅
@ -80,6 +80,7 @@ static constexpr u16 none_value = 0xffff;
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static constexpr size_t memory_range_per_bus = mmio_device_space_size * to_underlying(Limits::MaxFunctionsPerDevice) * to_underlying(Limits::MaxDevicesPerBus);
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static constexpr u32 bar_address_mask = 0xfffffff0;
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static constexpr u8 msi_control_offset = 2;
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static constexpr u16 msi_control_enable = 0x0001;
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static constexpr u16 msi_address_format_mask = 0x80;
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static constexpr u8 msi_mmc_format_mask = 0xe;
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static constexpr u16 msix_control_table_mask = 0x07ff;
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@ -41,11 +41,17 @@ void Device::disable_pin_based_interrupts() const
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void Device::enable_message_signalled_interrupts()
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{
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TODO();
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for (auto& capability : m_pci_identifier->capabilities()) {
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if (capability.id().value() == PCI::Capabilities::ID::MSI)
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capability.write16(msi_control_offset, capability.read16(msi_control_offset) | msi_control_enable);
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}
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}
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void Device::disable_message_signalled_interrupts()
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{
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TODO();
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for (auto& capability : m_pci_identifier->capabilities()) {
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if (capability.id().value() == PCI::Capabilities::ID::MSI)
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capability.write16(msi_control_offset, capability.read16(msi_control_offset) & ~(msi_control_enable));
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}
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}
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void Device::enable_extended_message_signalled_interrupts()
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