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Kernel: Implement {enable,disable}_msi interrupts in PCI Device

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Implement enabling and disabling MSI interrupts for a PCI device.

Removes two more TODO()s from PCI::Device.cpp :^)
This commit is contained in:
Pankaj Raghav 2023-05-08 21:28:28 +02:00 committed by Jelle Raaijmakers
parent 1bc2c5c110
commit 35a844ac75
Notes: sideshowbarker 2024-07-17 05:06:13 +09:00 
Author: https://github.com/Panky-codes
Commit: https://github.com/SerenityOS/serenity/commit/35a844ac75
Pull-request: https://github.com/SerenityOS/serenity/pull/18732
Reviewed-by: https://github.com/gmta ✅
Reviewed-by: https://github.com/supercomputer7 ✅
2 changed files with 9 additions and 2 deletions
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1
Kernel/Bus/PCI/Definitions.h
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@ -80,6 +80,7 @@ static constexpr u16 none_value = 0xffff;
static constexpr size_t memory_range_per_bus = mmio_device_space_size * to_underlying(Limits::MaxFunctionsPerDevice) * to_underlying(Limits::MaxDevicesPerBus); static constexpr size_t memory_range_per_bus = mmio_device_space_size * to_underlying(Limits::MaxFunctionsPerDevice) * to_underlying(Limits::MaxDevicesPerBus);
static constexpr u32 bar_address_mask = 0xfffffff0; static constexpr u32 bar_address_mask = 0xfffffff0;
static constexpr u8 msi_control_offset = 2; static constexpr u8 msi_control_offset = 2;
static constexpr u16 msi_control_enable = 0x0001;
static constexpr u16 msi_address_format_mask = 0x80; static constexpr u16 msi_address_format_mask = 0x80;
static constexpr u8 msi_mmc_format_mask = 0xe; static constexpr u8 msi_mmc_format_mask = 0xe;
static constexpr u16 msix_control_table_mask = 0x07ff; static constexpr u16 msix_control_table_mask = 0x07ff;

10
Kernel/Bus/PCI/Device.cpp
View File

@ -41,11 +41,17 @@ void Device::disable_pin_based_interrupts() const
void Device::enable_message_signalled_interrupts() void Device::enable_message_signalled_interrupts()
{ {
TODO(); for (auto& capability : m_pci_identifier->capabilities()) {
if (capability.id().value() == PCI::Capabilities::ID::MSI)
capability.write16(msi_control_offset, capability.read16(msi_control_offset) | msi_control_enable);
}
} }
void Device::disable_message_signalled_interrupts() void Device::disable_message_signalled_interrupts()
{ {
TODO(); for (auto& capability : m_pci_identifier->capabilities()) {
if (capability.id().value() == PCI::Capabilities::ID::MSI)
capability.write16(msi_control_offset, capability.read16(msi_control_offset) & ~(msi_control_enable));
}
} }
void Device::enable_extended_message_signalled_interrupts() void Device::enable_extended_message_signalled_interrupts()