From 83b87a5adec85e262f1e7712fc421cf9ca43cfa3 Mon Sep 17 00:00:00 2001 From: Pankaj Raghav Date: Mon, 24 Apr 2023 12:32:12 +0200 Subject: [PATCH] Kernel: Add bar_address_mask to mask the last 4 bits of a BAR address Create a bar_address_mask constant to mask the last 4 bits of a BAR address instead of hand coding the mask all over the kernel. --- Kernel/Bus/PCI/API.cpp | 4 ++-- Kernel/Bus/PCI/Definitions.h | 1 + Kernel/Graphics/Bochs/GraphicsAdapter.cpp | 10 +++++----- Kernel/Graphics/Intel/NativeGraphicsAdapter.cpp | 4 ++-- Kernel/Graphics/VMWare/GraphicsAdapter.cpp | 4 ++-- Kernel/IOWindow.cpp | 2 +- Kernel/Storage/NVMe/NVMeController.cpp | 2 +- Kernel/Storage/NVMe/NVMeDefinitions.h | 2 -- 8 files changed, 14 insertions(+), 15 deletions(-) diff --git a/Kernel/Bus/PCI/API.cpp b/Kernel/Bus/PCI/API.cpp index ff4602acd42..306f342a03d 100644 --- a/Kernel/Bus/PCI/API.cpp +++ b/Kernel/Bus/PCI/API.cpp @@ -227,7 +227,7 @@ size_t get_BAR_space_size(DeviceIdentifier const& identifier, HeaderType0BaseReg write32_offsetted(identifier, field, 0xFFFFFFFF); u32 space_size = read32_offsetted(identifier, field); write32_offsetted(identifier, field, bar_reserved); - space_size &= 0xfffffff0; + space_size &= bar_address_mask; space_size = (~space_size) + 1; return space_size; } @@ -240,7 +240,7 @@ size_t get_expansion_rom_space_size(DeviceIdentifier const& identifier) write32_offsetted(identifier, field, 0xFFFFFFFF); u32 space_size = read32_offsetted(identifier, field); write32_offsetted(identifier, field, bar_reserved); - space_size &= 0xfffffff0; + space_size &= bar_address_mask; space_size = (~space_size) + 1; return space_size; } diff --git a/Kernel/Bus/PCI/Definitions.h b/Kernel/Bus/PCI/Definitions.h index 8a5bf8d8dd2..e62d3fa2575 100644 --- a/Kernel/Bus/PCI/Definitions.h +++ b/Kernel/Bus/PCI/Definitions.h @@ -78,6 +78,7 @@ static constexpr u16 value_port = 0xcfc; static constexpr size_t mmio_device_space_size = 4096; static constexpr u16 none_value = 0xffff; static constexpr size_t memory_range_per_bus = mmio_device_space_size * to_underlying(Limits::MaxFunctionsPerDevice) * to_underlying(Limits::MaxDevicesPerBus); +static constexpr u32 bar_address_mask = 0xfffffff0; // Taken from https://pcisig.com/sites/default/files/files/PCI_Code-ID_r_1_11__v24_Jan_2019.pdf enum class ClassID { diff --git a/Kernel/Graphics/Bochs/GraphicsAdapter.cpp b/Kernel/Graphics/Bochs/GraphicsAdapter.cpp index 56191f7d54d..c707931bf6d 100644 --- a/Kernel/Graphics/Bochs/GraphicsAdapter.cpp +++ b/Kernel/Graphics/Bochs/GraphicsAdapter.cpp @@ -56,16 +56,16 @@ UNMAP_AFTER_INIT ErrorOr BochsGraphicsAdapter::initialize_adapter(PCI::Dev #if ARCH(X86_64) bool virtual_box_hardware = (pci_device_identifier.hardware_id().vendor_id == 0x80ee && pci_device_identifier.hardware_id().device_id == 0xbeef); if (pci_device_identifier.revision_id().value() == 0x0 || virtual_box_hardware) { - m_display_connector = BochsDisplayConnector::must_create(PhysicalAddress(PCI::get_BAR0(pci_device_identifier) & 0xfffffff0), bar0_space_size, virtual_box_hardware); + m_display_connector = BochsDisplayConnector::must_create(PhysicalAddress(PCI::get_BAR0(pci_device_identifier) & PCI::bar_address_mask), bar0_space_size, virtual_box_hardware); } else { - auto registers_mapping = TRY(Memory::map_typed_writable(PhysicalAddress(PCI::get_BAR2(pci_device_identifier) & 0xfffffff0))); + auto registers_mapping = TRY(Memory::map_typed_writable(PhysicalAddress(PCI::get_BAR2(pci_device_identifier) & PCI::bar_address_mask))); VERIFY(registers_mapping.region); - m_display_connector = QEMUDisplayConnector::must_create(PhysicalAddress(PCI::get_BAR0(pci_device_identifier) & 0xfffffff0), bar0_space_size, move(registers_mapping)); + m_display_connector = QEMUDisplayConnector::must_create(PhysicalAddress(PCI::get_BAR0(pci_device_identifier) & PCI::bar_address_mask), bar0_space_size, move(registers_mapping)); } #else - auto registers_mapping = TRY(Memory::map_typed_writable(PhysicalAddress(PCI::get_BAR2(pci_device_identifier) & 0xfffffff0))); + auto registers_mapping = TRY(Memory::map_typed_writable(PhysicalAddress(PCI::get_BAR2(pci_device_identifier) & PCI::bar_address_mask))); VERIFY(registers_mapping.region); - m_display_connector = QEMUDisplayConnector::must_create(PhysicalAddress(PCI::get_BAR0(pci_device_identifier) & 0xfffffff0), bar0_space_size, move(registers_mapping)); + m_display_connector = QEMUDisplayConnector::must_create(PhysicalAddress(PCI::get_BAR0(pci_device_identifier) & PCI::bar_address_mask), bar0_space_size, move(registers_mapping)); #endif // Note: According to Gerd Hoffmann - "The linux driver simply does diff --git a/Kernel/Graphics/Intel/NativeGraphicsAdapter.cpp b/Kernel/Graphics/Intel/NativeGraphicsAdapter.cpp index eee9fab9208..4a06e3a8d09 100644 --- a/Kernel/Graphics/Intel/NativeGraphicsAdapter.cpp +++ b/Kernel/Graphics/Intel/NativeGraphicsAdapter.cpp @@ -47,8 +47,8 @@ ErrorOr IntelNativeGraphicsAdapter::initialize_adapter() dmesgln_pci(*this, "framebuffer @ {}", PhysicalAddress(PCI::get_BAR2(device_identifier()))); using MMIORegion = IntelDisplayConnectorGroup::MMIORegion; - MMIORegion first_region { MMIORegion::BARAssigned::BAR0, PhysicalAddress(PCI::get_BAR0(device_identifier()) & 0xfffffff0), bar0_space_size }; - MMIORegion second_region { MMIORegion::BARAssigned::BAR2, PhysicalAddress(PCI::get_BAR2(device_identifier()) & 0xfffffff0), bar2_space_size }; + MMIORegion first_region { MMIORegion::BARAssigned::BAR0, PhysicalAddress(PCI::get_BAR0(device_identifier()) & PCI::bar_address_mask), bar0_space_size }; + MMIORegion second_region { MMIORegion::BARAssigned::BAR2, PhysicalAddress(PCI::get_BAR2(device_identifier()) & PCI::bar_address_mask), bar2_space_size }; PCI::enable_bus_mastering(device_identifier()); PCI::enable_io_space(device_identifier()); diff --git a/Kernel/Graphics/VMWare/GraphicsAdapter.cpp b/Kernel/Graphics/VMWare/GraphicsAdapter.cpp index e79c62586ba..15f86f8286d 100644 --- a/Kernel/Graphics/VMWare/GraphicsAdapter.cpp +++ b/Kernel/Graphics/VMWare/GraphicsAdapter.cpp @@ -69,7 +69,7 @@ UNMAP_AFTER_INIT ErrorOr VMWareGraphicsAdapter::initialize_fifo_registers( { auto framebuffer_size = read_io_register(VMWareDisplayRegistersOffset::FB_SIZE); auto fifo_size = read_io_register(VMWareDisplayRegistersOffset::MEM_SIZE); - auto fifo_physical_address = PhysicalAddress(PCI::get_BAR2(device_identifier()) & 0xfffffff0); + auto fifo_physical_address = PhysicalAddress(PCI::get_BAR2(device_identifier()) & PCI::bar_address_mask); dbgln("VMWare SVGA @ {}: framebuffer size {} bytes, FIFO size {} bytes @ {}", device_identifier().address(), framebuffer_size, fifo_size, fifo_physical_address); if (framebuffer_size < 0x100000 || fifo_size < 0x10000) { @@ -185,7 +185,7 @@ UNMAP_AFTER_INIT ErrorOr VMWareGraphicsAdapter::initialize_adapter() auto bar1_space_size = PCI::get_BAR_space_size(device_identifier(), PCI::HeaderType0BaseRegister::BAR1); - m_display_connector = VMWareDisplayConnector::must_create(*this, PhysicalAddress(PCI::get_BAR1(device_identifier()) & 0xfffffff0), bar1_space_size); + m_display_connector = VMWareDisplayConnector::must_create(*this, PhysicalAddress(PCI::get_BAR1(device_identifier()) & PCI::bar_address_mask), bar1_space_size); TRY(m_display_connector->set_safe_mode_setting()); return {}; } diff --git a/Kernel/IOWindow.cpp b/Kernel/IOWindow.cpp index d6dda730ae8..aa3fbe12251 100644 --- a/Kernel/IOWindow.cpp +++ b/Kernel/IOWindow.cpp @@ -101,7 +101,7 @@ ErrorOr> IOWindow::create_for_pci_device_bar(PCI::Device return Error::from_errno(EOVERFLOW); if (pci_bar_space_type == PCI::BARSpaceType::Memory64BitSpace && Checked::addition_would_overflow(pci_bar_value, space_length)) return Error::from_errno(EOVERFLOW); - auto memory_mapped_range = TRY(Memory::adopt_new_nonnull_own_typed_mapping(PhysicalAddress(pci_bar_value & 0xfffffff0), space_length, Memory::Region::Access::ReadWrite)); + auto memory_mapped_range = TRY(Memory::adopt_new_nonnull_own_typed_mapping(PhysicalAddress(pci_bar_value & PCI::bar_address_mask), space_length, Memory::Region::Access::ReadWrite)); return TRY(adopt_nonnull_own_or_enomem(new (nothrow) IOWindow(move(memory_mapped_range)))); } diff --git a/Kernel/Storage/NVMe/NVMeController.cpp b/Kernel/Storage/NVMe/NVMeController.cpp index 24d5b4657d7..8797fc93a9c 100644 --- a/Kernel/Storage/NVMe/NVMeController.cpp +++ b/Kernel/Storage/NVMe/NVMeController.cpp @@ -40,7 +40,7 @@ UNMAP_AFTER_INIT ErrorOr NVMeController::initialize(bool is_queue_polled) PCI::enable_memory_space(device_identifier()); PCI::enable_bus_mastering(device_identifier()); - m_bar = PCI::get_BAR0(device_identifier()) & BAR_ADDR_MASK; + m_bar = PCI::get_BAR0(device_identifier()) & PCI::bar_address_mask; static_assert(sizeof(ControllerRegister) == REG_SQ0TDBL_START); static_assert(sizeof(NVMeSubmission) == (1 << SQ_WIDTH)); diff --git a/Kernel/Storage/NVMe/NVMeDefinitions.h b/Kernel/Storage/NVMe/NVMeDefinitions.h index b7ce1416ced..249a0895764 100644 --- a/Kernel/Storage/NVMe/NVMeDefinitions.h +++ b/Kernel/Storage/NVMe/NVMeDefinitions.h @@ -34,8 +34,6 @@ struct IdentifyNamespace { u64 rsvd3[488]; }; -// BAR -static constexpr u32 BAR_ADDR_MASK = 0xFFFFFFF0; // DOORBELL static constexpr u32 REG_SQ0TDBL_START = 0x1000; static constexpr u32 REG_SQ0TDBL_END = 0x1003;