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strace: Replace incorrect syscall arg2 register
Since commit e6df1c9988
which switched us
over to using the syscall/sysret instruction the second syscall
argument changed from rcx to rdi. Update strace as well to print the
actually correct values for the second arg.
This commit is contained in:
parent
209c588ed1
commit
c55b4d49a3
Notes:
sideshowbarker
2024-07-17 02:35:27 +09:00
Author: https://github.com/IdanHo Commit: https://github.com/SerenityOS/serenity/commit/c55b4d49a3 Pull-request: https://github.com/SerenityOS/serenity/pull/23421
@ -899,7 +899,7 @@ ErrorOr<int> serenity_main(Main::Arguments arguments)
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#if ARCH(X86_64)
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syscall_arg_t syscall_index = regs.rax;
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syscall_arg_t arg1 = regs.rdx;
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syscall_arg_t arg2 = regs.rcx;
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syscall_arg_t arg2 = regs.rdi;
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syscall_arg_t arg3 = regs.rbx;
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#elif ARCH(AARCH64)
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syscall_arg_t syscall_index = 0; // FIXME
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