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Kernel: Add CNTFRQ_EL0, Counter-timer Frequency Register

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konrad 2022-12-24 01:18:29 +01:00 committed by Andreas Kling
parent 91c3d7199f
commit d0b73352cc
Notes: sideshowbarker 2024-07-19 17:00:56 +09:00 
Author: https://github.com/konradekk
Commit: https://github.com/SerenityOS/serenity/commit/d0b73352cc1
Pull-request: https://github.com/SerenityOS/serenity/pull/16647
Reviewed-by: https://github.com/nico ✅
1 changed files with 18 additions and 0 deletions
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18
Kernel/Arch/aarch64/Registers.h
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@ -102,6 +102,24 @@ struct alignas(u64) ID_AA64MMFR0_EL1 {
};
static_assert(sizeof(ID_AA64MMFR0_EL1) == 8);
// https://developer.arm.com/documentation/ddi0595/2020-12/AArch64-Registers/CNTFRQ-EL0--Counter-timer-Frequency-register
// CNTFRQ_EL0, Counter-timer Frequency register
struct alignas(u64) CNTFRQ_EL0 {
int : 32;
int ClockFrequency : 32;
static inline CNTFRQ_EL0 read()
{
CNTFRQ_EL0 frequency;
asm("mrs %[value], CNTFRQ_EL0"
: [value] "=r"(frequency));
return frequency;
}
};
static_assert(sizeof(CNTFRQ_EL0) == 8);
// https://developer.arm.com/documentation/ddi0595/2021-06/AArch64-Registers/TCR-EL1--Translation-Control-Register--EL1-
// Translation Control Register
struct alignas(u64) TCR_EL1 {