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Kernel: Use peripheral addresses returned from MMIO to map prekernel mem
This commit is contained in:
parent
4e9777243e
commit
f7c0cdcc19
Notes:
sideshowbarker
2024-07-18 00:32:44 +09:00
Author: https://github.com/jamesmintram Commit: https://github.com/SerenityOS/serenity/commit/f7c0cdcc194 Pull-request: https://github.com/SerenityOS/serenity/pull/10514 Reviewed-by: https://github.com/mundak ✅ Reviewed-by: https://github.com/nico
@ -25,6 +25,9 @@ public:
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template<class T>
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T volatile* peripheral(FlatPtr offset) { return (T volatile*)peripheral_address(offset); }
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FlatPtr peripheral_base_address() const { return m_base_address; }
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FlatPtr peripheral_end_address() const { return m_base_address + 0x00FFFFFF; }
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private:
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MMIO();
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@ -10,6 +10,7 @@
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#include <Kernel/Arch/aarch64/ASM_wrapper.h>
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#include <Kernel/Arch/aarch64/Registers.h>
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#include <Kernel/Prekernel/Arch/aarch64/MMIO.h>
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#include <Kernel/Prekernel/Arch/aarch64/UART.h>
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// Documentation here for Aarch64 Address Translations
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@ -26,8 +27,6 @@ namespace Prekernel {
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// physical memory
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constexpr u32 START_OF_NORMAL_MEMORY = 0x00000000;
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constexpr u32 END_OF_NORMAL_MEMORY = 0x3EFFFFFF;
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constexpr u32 START_OF_DEVICE_MEMORY = 0x3F000000;
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constexpr u32 END_OF_DEVICE_MEMORY = 0x3FFFFFFF;
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// 4KiB page size was chosen for the prekernel to make this code slightly simpler
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constexpr u32 GRANULE_SIZE = 0x1000;
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@ -49,24 +48,11 @@ constexpr u32 INNER_SHAREABLE = (3 << 8);
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constexpr u32 NORMAL_MEMORY = (0 << 2);
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constexpr u32 DEVICE_MEMORY = (1 << 2);
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constexpr u64* descriptor_to_pointer(u64 descriptor)
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constexpr u64* descriptor_to_pointer(FlatPtr descriptor)
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{
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return (u64*)(descriptor & DESCRIPTOR_MASK);
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}
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using page_table_t = u8*;
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static void zero_pages(u64* start, u64* end)
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{
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// Memset all page table memory to zero
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for (u64* p = (u64*)start;
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p < (u64*)end;
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p++) {
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*p = 0;
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}
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}
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namespace {
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class PageBumpAllocator {
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public:
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@ -78,7 +64,7 @@ public:
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if (m_start >= m_end) {
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Prekernel::panic("Invalid memory range passed to PageBumpAllocator");
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}
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if ((u64)m_start % PAGE_TABLE_SIZE != 0 || (u64)m_end % PAGE_TABLE_SIZE != 0) {
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if ((FlatPtr)m_start % PAGE_TABLE_SIZE != 0 || (FlatPtr)m_end % PAGE_TABLE_SIZE != 0) {
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Prekernel::panic("Memory range passed into PageBumpAllocator not aligned to PAGE_TABLE_SIZE");
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}
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}
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@ -90,63 +76,74 @@ public:
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}
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u64* page = m_current;
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m_current += (PAGE_TABLE_SIZE / sizeof(u64));
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m_current += (PAGE_TABLE_SIZE / sizeof(FlatPtr));
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zero_pages(page, page + (PAGE_TABLE_SIZE / sizeof(u64)));
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zero_page(page);
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return page;
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}
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private:
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void zero_page(u64* page)
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{
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// Memset all page table memory to zero
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for (u64* p = page; p < page + (PAGE_TABLE_SIZE / sizeof(u64)); p++) {
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*p = 0;
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}
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}
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const u64* m_start;
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const u64* m_end;
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u64* m_current;
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};
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}
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static void insert_identity_entries_for_physical_memory_range(PageBumpAllocator& allocator, u64* page_table, FlatPtr start, FlatPtr end, u64 flags)
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{
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// Not very efficient, but simple and it works.
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for (FlatPtr addr = start; addr < end; addr += GRANULE_SIZE) {
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// Each level has 9 bits (512 entries)
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u64 level0_idx = (addr >> 39) & 0x1FF;
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u64 level1_idx = (addr >> 30) & 0x1FF;
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u64 level2_idx = (addr >> 21) & 0x1FF;
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u64 level3_idx = (addr >> 12) & 0x1FF;
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u64* level1_table = page_table;
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if (level1_table[level0_idx] == 0) {
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level1_table[level0_idx] = (FlatPtr)allocator.take_page();
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level1_table[level0_idx] |= TABLE_DESCRIPTOR;
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}
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u64* level2_table = descriptor_to_pointer(level1_table[level0_idx]);
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if (level2_table[level1_idx] == 0) {
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level2_table[level1_idx] = (FlatPtr)allocator.take_page();
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level2_table[level1_idx] |= TABLE_DESCRIPTOR;
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}
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u64* level3_table = descriptor_to_pointer(level2_table[level1_idx]);
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if (level3_table[level2_idx] == 0) {
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level3_table[level2_idx] = (FlatPtr)allocator.take_page();
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level3_table[level2_idx] |= TABLE_DESCRIPTOR;
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}
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u64* level4_table = descriptor_to_pointer(level3_table[level2_idx]);
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u64* l4_entry = &level4_table[level3_idx];
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*l4_entry = addr;
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*l4_entry |= flags;
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}
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}
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static void build_identity_map(PageBumpAllocator& allocator)
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{
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u64* level1_table = allocator.take_page();
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level1_table[0] = (u64)allocator.take_page();
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level1_table[0] |= TABLE_DESCRIPTOR;
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u64 normal_memory_flags = ACCESS_FLAG | PAGE_DESCRIPTOR | INNER_SHAREABLE | NORMAL_MEMORY;
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u64 device_memory_flags = ACCESS_FLAG | PAGE_DESCRIPTOR | OUTER_SHAREABLE | DEVICE_MEMORY;
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u64* level2_table = descriptor_to_pointer(level1_table[0]);
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level2_table[0] = (u64)allocator.take_page();
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level2_table[0] |= TABLE_DESCRIPTOR;
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u64* level3_table = descriptor_to_pointer(level2_table[0]);
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// // Set up L3 entries
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for (uint32_t l3_idx = 0; l3_idx < 512; l3_idx++) {
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level3_table[l3_idx] = (u64)allocator.take_page();
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level3_table[l3_idx] |= TABLE_DESCRIPTOR;
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}
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// Set up L4 entries
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size_t page_index = 0;
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for (size_t addr = START_OF_NORMAL_MEMORY; addr < END_OF_NORMAL_MEMORY; addr += GRANULE_SIZE, page_index++) {
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u64* level4_table = descriptor_to_pointer(level3_table[page_index / 512]);
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u64* l4_entry = &level4_table[page_index % 512];
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*l4_entry = addr;
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*l4_entry |= ACCESS_FLAG;
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*l4_entry |= PAGE_DESCRIPTOR;
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*l4_entry |= INNER_SHAREABLE;
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*l4_entry |= NORMAL_MEMORY;
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}
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// Set up entries for last 16MB of memory (MMIO)
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for (size_t addr = START_OF_DEVICE_MEMORY; addr < END_OF_DEVICE_MEMORY; addr += GRANULE_SIZE, page_index++) {
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u64* level4_table = descriptor_to_pointer(level3_table[page_index / 512]);
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u64* l4_entry = &level4_table[page_index % 512];
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*l4_entry = addr;
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*l4_entry |= ACCESS_FLAG;
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*l4_entry |= PAGE_DESCRIPTOR;
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*l4_entry |= OUTER_SHAREABLE;
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*l4_entry |= DEVICE_MEMORY;
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}
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insert_identity_entries_for_physical_memory_range(allocator, level1_table, START_OF_NORMAL_MEMORY, END_OF_NORMAL_MEMORY, normal_memory_flags);
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insert_identity_entries_for_physical_memory_range(allocator, level1_table, MMIO::the().peripheral_base_address(), MMIO::the().peripheral_end_address(), device_memory_flags);
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}
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static void switch_to_page_table(u8* page_table)
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