mirror of
https://github.com/LadybirdBrowser/ladybird.git
synced 2024-11-10 13:00:29 +03:00
Kernel: Run clang-format on PCI definitions file
This commit is contained in:
Liav A
Andreas Kling
parent
0cda92d5da
commit
fc611be592
Notes:
sideshowbarker
2024-07-19 08:59:58 +09:00
Author: https://github.com/supercomputer7 Commit: https://github.com/SerenityOS/serenity/commit/fc611be5929 Pull-request: https://github.com/SerenityOS/serenity/pull/1290
@ -31,29 +31,29 @@
|
||||
|
||||
namespace Kernel {
|
||||
|
||||
|
||||
#define PCI_VENDOR_ID 0x00 // word
|
||||
#define PCI_DEVICE_ID 0x02 // word
|
||||
#define PCI_COMMAND 0x04 // word
|
||||
#define PCI_STATUS 0x06 // word
|
||||
#define PCI_REVISION_ID 0x08 // byte
|
||||
#define PCI_PROG_IF 0x09 // byte
|
||||
#define PCI_SUBCLASS 0x0a // byte
|
||||
#define PCI_CLASS 0x0b // byte
|
||||
#define PCI_CACHE_LINE_SIZE 0x0c // byte
|
||||
#define PCI_LATENCY_TIMER 0x0d // byte
|
||||
#define PCI_HEADER_TYPE 0x0e // byte
|
||||
#define PCI_BIST 0x0f // byte
|
||||
#define PCI_BAR0 0x10 // u32
|
||||
#define PCI_BAR1 0x14 // u32
|
||||
#define PCI_BAR2 0x18 // u32
|
||||
#define PCI_BAR3 0x1C // u32
|
||||
#define PCI_BAR4 0x20 // u32
|
||||
#define PCI_BAR5 0x24 // u32
|
||||
#define PCI_SUBSYSTEM_ID 0x2C // u16
|
||||
#define PCI_SUBSYSTEM_VENDOR_ID 0x2E // u16
|
||||
#define PCI_INTERRUPT_LINE 0x3C // byte
|
||||
#define PCI_SECONDARY_BUS 0x19 // byte
|
||||
#define PCI_VENDOR_ID 0x00 // word
|
||||
#define PCI_DEVICE_ID 0x02 // word
|
||||
#define PCI_COMMAND 0x04 // word
|
||||
#define PCI_STATUS 0x06 // word
|
||||
#define PCI_REVISION_ID 0x08 // byte
|
||||
#define PCI_PROG_IF 0x09 // byte
|
||||
#define PCI_SUBCLASS 0x0a // byte
|
||||
#define PCI_CLASS 0x0b // byte
|
||||
#define PCI_CACHE_LINE_SIZE 0x0c // byte
|
||||
#define PCI_LATENCY_TIMER 0x0d // byte
|
||||
#define PCI_HEADER_TYPE 0x0e // byte
|
||||
#define PCI_BIST 0x0f // byte
|
||||
#define PCI_BAR0 0x10 // u32
|
||||
#define PCI_BAR1 0x14 // u32
|
||||
#define PCI_BAR2 0x18 // u32
|
||||
#define PCI_BAR3 0x1C // u32
|
||||
#define PCI_BAR4 0x20 // u32
|
||||
#define PCI_BAR5 0x24 // u32
|
||||
#define PCI_SUBSYSTEM_ID 0x2C // u16
|
||||
#define PCI_SUBSYSTEM_VENDOR_ID 0x2E // u16
|
||||
#define PCI_CAPABILITIES_POINTER 0x34 // u8
|
||||
#define PCI_INTERRUPT_LINE 0x3C // byte
|
||||
#define PCI_SECONDARY_BUS 0x19 // byte
|
||||
#define PCI_HEADER_TYPE_DEVICE 0
|
||||
#define PCI_HEADER_TYPE_BRIDGE 1
|
||||
#define PCI_TYPE_BRIDGE 0x0604
|
||||
@ -67,128 +67,128 @@ namespace Kernel {
|
||||
//#define PCI_DEBUG 1
|
||||
|
||||
namespace PCI {
|
||||
struct ID {
|
||||
u16 vendor_id { 0 };
|
||||
u16 device_id { 0 };
|
||||
struct ID {
|
||||
u16 vendor_id { 0 };
|
||||
u16 device_id { 0 };
|
||||
|
||||
bool is_null() const { return !vendor_id && !device_id; }
|
||||
bool is_null() const { return !vendor_id && !device_id; }
|
||||
|
||||
bool operator==(const ID& other) const
|
||||
{
|
||||
return vendor_id == other.vendor_id && device_id == other.device_id;
|
||||
}
|
||||
bool operator!=(const ID& other) const
|
||||
{
|
||||
return vendor_id != other.vendor_id || device_id != other.device_id;
|
||||
}
|
||||
};
|
||||
bool operator==(const ID& other) const
|
||||
{
|
||||
return vendor_id == other.vendor_id && device_id == other.device_id;
|
||||
}
|
||||
bool operator!=(const ID& other) const
|
||||
{
|
||||
return vendor_id != other.vendor_id || device_id != other.device_id;
|
||||
}
|
||||
};
|
||||
|
||||
struct Address {
|
||||
public:
|
||||
Address() {}
|
||||
Address(u16 seg)
|
||||
: m_seg(seg)
|
||||
, m_bus(0)
|
||||
, m_slot(0)
|
||||
, m_function(0)
|
||||
{
|
||||
}
|
||||
Address(u16 seg, u8 bus, u8 slot, u8 function)
|
||||
: m_seg(seg)
|
||||
, m_bus(bus)
|
||||
, m_slot(slot)
|
||||
, m_function(function)
|
||||
{
|
||||
}
|
||||
struct Address {
|
||||
public:
|
||||
Address() {}
|
||||
Address(u16 seg)
|
||||
: m_seg(seg)
|
||||
, m_bus(0)
|
||||
, m_slot(0)
|
||||
, m_function(0)
|
||||
{
|
||||
}
|
||||
Address(u16 seg, u8 bus, u8 slot, u8 function)
|
||||
: m_seg(seg)
|
||||
, m_bus(bus)
|
||||
, m_slot(slot)
|
||||
, m_function(function)
|
||||
{
|
||||
}
|
||||
|
||||
Address(const Address& address)
|
||||
: m_seg(address.seg())
|
||||
, m_bus(address.bus())
|
||||
, m_slot(address.slot())
|
||||
, m_function(address.function())
|
||||
{
|
||||
}
|
||||
Address(const Address& address)
|
||||
: m_seg(address.seg())
|
||||
, m_bus(address.bus())
|
||||
, m_slot(address.slot())
|
||||
, m_function(address.function())
|
||||
{
|
||||
}
|
||||
|
||||
bool is_null() const { return !m_bus && !m_slot && !m_function; }
|
||||
operator bool() const { return !is_null(); }
|
||||
bool is_null() const { return !m_bus && !m_slot && !m_function; }
|
||||
operator bool() const { return !is_null(); }
|
||||
|
||||
u16 seg() const { return m_seg; }
|
||||
u8 bus() const { return m_bus; }
|
||||
u8 slot() const { return m_slot; }
|
||||
u8 function() const { return m_function; }
|
||||
u16 seg() const { return m_seg; }
|
||||
u8 bus() const { return m_bus; }
|
||||
u8 slot() const { return m_slot; }
|
||||
u8 function() const { return m_function; }
|
||||
|
||||
u32 io_address_for_field(u8 field) const
|
||||
{
|
||||
return 0x80000000u | (m_bus << 16u) | (m_slot << 11u) | (m_function << 8u) | (field & 0xfc);
|
||||
}
|
||||
u32 io_address_for_field(u8 field) const
|
||||
{
|
||||
return 0x80000000u | (m_bus << 16u) | (m_slot << 11u) | (m_function << 8u) | (field & 0xfc);
|
||||
}
|
||||
|
||||
protected:
|
||||
u32 m_seg { 0 };
|
||||
u8 m_bus { 0 };
|
||||
u8 m_slot { 0 };
|
||||
u8 m_function { 0 };
|
||||
};
|
||||
protected:
|
||||
u32 m_seg { 0 };
|
||||
u8 m_bus { 0 };
|
||||
u8 m_slot { 0 };
|
||||
u8 m_function { 0 };
|
||||
};
|
||||
|
||||
struct ChangeableAddress : public Address {
|
||||
ChangeableAddress()
|
||||
: Address(0)
|
||||
{
|
||||
}
|
||||
explicit ChangeableAddress(u16 seg)
|
||||
: Address(seg)
|
||||
{
|
||||
}
|
||||
ChangeableAddress(u16 seg, u8 bus, u8 slot, u8 function)
|
||||
: Address(seg, bus, slot, function)
|
||||
{
|
||||
}
|
||||
void set_seg(u16 seg) { m_seg = seg; }
|
||||
void set_bus(u8 bus) { m_bus = bus; }
|
||||
void set_slot(u8 slot) { m_slot = slot; }
|
||||
void set_function(u8 function) { m_function = function; }
|
||||
bool operator==(const Address& address)
|
||||
{
|
||||
if (m_seg == address.seg() && m_bus == address.bus() && m_slot == address.slot() && m_function == address.function())
|
||||
return true;
|
||||
else
|
||||
return false;
|
||||
}
|
||||
const ChangeableAddress& operator=(const Address& address)
|
||||
{
|
||||
set_seg(address.seg());
|
||||
set_bus(address.bus());
|
||||
set_slot(address.slot());
|
||||
set_function(address.function());
|
||||
return *this;
|
||||
}
|
||||
};
|
||||
struct ChangeableAddress : public Address {
|
||||
ChangeableAddress()
|
||||
: Address(0)
|
||||
{
|
||||
}
|
||||
explicit ChangeableAddress(u16 seg)
|
||||
: Address(seg)
|
||||
{
|
||||
}
|
||||
ChangeableAddress(u16 seg, u8 bus, u8 slot, u8 function)
|
||||
: Address(seg, bus, slot, function)
|
||||
{
|
||||
}
|
||||
void set_seg(u16 seg) { m_seg = seg; }
|
||||
void set_bus(u8 bus) { m_bus = bus; }
|
||||
void set_slot(u8 slot) { m_slot = slot; }
|
||||
void set_function(u8 function) { m_function = function; }
|
||||
bool operator==(const Address& address)
|
||||
{
|
||||
if (m_seg == address.seg() && m_bus == address.bus() && m_slot == address.slot() && m_function == address.function())
|
||||
return true;
|
||||
else
|
||||
return false;
|
||||
}
|
||||
const ChangeableAddress& operator=(const Address& address)
|
||||
{
|
||||
set_seg(address.seg());
|
||||
set_bus(address.bus());
|
||||
set_slot(address.slot());
|
||||
set_function(address.function());
|
||||
return *this;
|
||||
}
|
||||
};
|
||||
|
||||
ID get_id(PCI::Address);
|
||||
void enumerate_all(Function<void(Address, ID)> callback);
|
||||
void enable_interrupt_line(Address);
|
||||
void disable_interrupt_line(Address);
|
||||
u8 get_interrupt_line(Address);
|
||||
u32 get_BAR0(Address);
|
||||
u32 get_BAR1(Address);
|
||||
u32 get_BAR2(Address);
|
||||
u32 get_BAR3(Address);
|
||||
u32 get_BAR4(Address);
|
||||
u32 get_BAR5(Address);
|
||||
u8 get_revision_id(Address);
|
||||
u8 get_subclass(Address);
|
||||
u8 get_class(Address);
|
||||
u16 get_subsystem_id(Address);
|
||||
u16 get_subsystem_vendor_id(Address);
|
||||
size_t get_BAR_Space_Size(Address, u8);
|
||||
void enable_bus_mastering(Address);
|
||||
void disable_bus_mastering(Address);
|
||||
ID get_id(PCI::Address);
|
||||
void enumerate_all(Function<void(Address, ID)> callback);
|
||||
void enable_interrupt_line(Address);
|
||||
void disable_interrupt_line(Address);
|
||||
u8 get_interrupt_line(Address);
|
||||
u32 get_BAR0(Address);
|
||||
u32 get_BAR1(Address);
|
||||
u32 get_BAR2(Address);
|
||||
u32 get_BAR3(Address);
|
||||
u32 get_BAR4(Address);
|
||||
u32 get_BAR5(Address);
|
||||
u8 get_revision_id(Address);
|
||||
u8 get_subclass(Address);
|
||||
u8 get_class(Address);
|
||||
u16 get_subsystem_id(Address);
|
||||
u16 get_subsystem_vendor_id(Address);
|
||||
size_t get_BAR_Space_Size(Address, u8);
|
||||
void enable_bus_mastering(Address);
|
||||
void disable_bus_mastering(Address);
|
||||
|
||||
class Initializer;
|
||||
class Access;
|
||||
class MMIOAccess;
|
||||
class IOAccess;
|
||||
class MMIOSegment;
|
||||
class Device;
|
||||
class Initializer;
|
||||
class Access;
|
||||
class MMIOAccess;
|
||||
class IOAccess;
|
||||
class MMIOSegment;
|
||||
class Device;
|
||||
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user