Commit Graph

9 Commits

Author SHA1 Message Date
Liav A
ab87d42200 Kernel: Remove the enabled concept of IRQ handlers
An IRQ handler should always be ready to respond to any IRQ.
We must remember that hardware can generate IRQs without any interaction
from our code at all. Ignoring IRQs in such cases is obviously not the
right thing to do.
2020-08-28 09:16:18 +02:00
Liav A
a431108ab6 Kernel: Add and remove explicit keyword where needed 2020-08-28 09:16:18 +02:00
Tom
bc107d0b33 Kernel: Add SMP IPI support
We can now properly initialize all processors without
crashing by sending SMP IPI messages to synchronize memory
between processors.

We now initialize the APs once we have the scheduler running.
This is so that we can process IPI messages from the other
cores.

Also rework interrupt handling a bit so that it's more of a
1:1 mapping. We need to allocate non-sharable interrupts for
IPIs.

This also fixes the occasional hang/crash because all
CPUs now synchronize memory with each other.
2020-07-06 17:07:44 +02:00
Liav A
3f98a67d75 Interrupts: Remove unused methods 2020-03-24 16:15:33 +01:00
Liav A
e880fe0765 Kernel: Use a const reference to RegisterState in IRQ handling 2020-03-19 15:48:00 +01:00
Liav A
773afefe7c Kernel: Change HandlerPurpose to HandlerType
Also, GenericInterruptHandler class requires to implement two new
methods.
2020-03-06 11:19:51 +01:00
Liav A
e22ab33a4d Kernel: Add SpuriousInterruptHandler type into HandlerPurpose 2020-02-29 00:12:46 +01:00
Liav A
fe664965c2 Kernel: Change get_sharing_devices_count() in GenericInterruptHandler
The new method' name is sharing_devices_count().
The Serenity Coding Style tends to not accept the word "get" in
methods' names if possible.
2020-02-24 11:27:03 +01:00
Liav A
b201b23363 Kernel: Add Interrupt Management and Generic Interrupt Handler
The GenericInterruptHandler class will be used to represent
an abstract interrupt handler. The InterruptManagement class will
represent a centralized component to manage interrupts.
2020-02-24 11:27:03 +01:00