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398d271a46
About half of the Processor code is common across architectures, so let's share it with a templated base class. Also, other code that can be shared in some ways, like FPUState and TrapFrame functions, is adjusted here. Functions which cannot be shared trivially (without internal refactoring) are left alone for now.
155 lines
2.7 KiB
C++
155 lines
2.7 KiB
C++
/*
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* Copyright (c) 2018-2021, Andreas Kling <kling@serenityos.org>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/Types.h>
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#include <AK/Platform.h>
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VALIDATE_IS_X86()
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namespace Kernel {
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ALWAYS_INLINE void cli()
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{
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asm volatile("cli" ::
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: "memory");
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}
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ALWAYS_INLINE void sti()
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{
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asm volatile("sti" ::
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: "memory");
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}
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ALWAYS_INLINE FlatPtr cpu_flags()
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{
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FlatPtr flags;
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asm volatile(
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"pushf\n"
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"pop %0\n"
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: "=rm"(flags)::"memory");
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return flags;
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}
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template<typename T>
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ALWAYS_INLINE T read_gs_value(FlatPtr offset)
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{
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T val;
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asm volatile(
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"mov %%gs:%a[off], %[val]"
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: [val] "=r"(val)
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: [off] "ir"(offset));
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return val;
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}
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template<typename T>
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ALWAYS_INLINE void write_gs_value(FlatPtr offset, T val)
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{
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asm volatile(
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"mov %[val], %%gs:%a[off]" ::[off] "ir"(offset), [val] "r"(val)
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: "memory");
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}
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ALWAYS_INLINE FlatPtr read_gs_ptr(FlatPtr offset)
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{
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FlatPtr val;
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asm volatile(
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"mov %%gs:%a[off], %[val]"
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: [val] "=r"(val)
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: [off] "ir"(offset));
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return val;
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}
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ALWAYS_INLINE void write_gs_ptr(u32 offset, FlatPtr val)
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{
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asm volatile(
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"mov %[val], %%gs:%a[off]" ::[off] "ir"(offset), [val] "r"(val)
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: "memory");
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}
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ALWAYS_INLINE bool are_interrupts_enabled()
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{
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return (cpu_flags() & 0x200) != 0;
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}
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FlatPtr read_cr0();
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FlatPtr read_cr2();
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FlatPtr read_cr3();
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FlatPtr read_cr4();
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u64 read_xcr0();
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void write_cr0(FlatPtr);
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void write_cr3(FlatPtr);
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void write_cr4(FlatPtr);
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void write_xcr0(u64);
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void flush_idt();
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ALWAYS_INLINE void load_task_register(u16 selector)
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{
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asm("ltr %0" ::"r"(selector));
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}
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FlatPtr read_dr0();
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void write_dr0(FlatPtr);
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FlatPtr read_dr1();
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void write_dr1(FlatPtr);
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FlatPtr read_dr2();
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void write_dr2(FlatPtr);
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FlatPtr read_dr3();
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void write_dr3(FlatPtr);
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FlatPtr read_dr6();
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void write_dr6(FlatPtr);
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FlatPtr read_dr7();
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void write_dr7(FlatPtr);
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ALWAYS_INLINE void read_tsc(u32& lsw, u32& msw)
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{
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asm volatile("rdtsc"
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: "=d"(msw), "=a"(lsw));
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}
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ALWAYS_INLINE u64 read_tsc()
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{
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u32 lsw;
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u32 msw;
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read_tsc(lsw, msw);
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return ((u64)msw << 32) | lsw;
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}
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ALWAYS_INLINE u32 read_rdrand()
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{
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u32 value;
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asm volatile(
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"1:\n"
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"rdrand %0\n"
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"jnc 1b\n"
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: "=r"(value)::"cc");
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return value;
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}
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ALWAYS_INLINE u32 read_rdseed()
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{
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u32 value;
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asm volatile(
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"1:\n"
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"rdseed %0\n"
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"jnc 1b\n"
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: "=r"(value)::"cc");
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return value;
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}
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void stac();
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void clac();
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[[noreturn]] ALWAYS_INLINE void halt_this()
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{
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for (;;) {
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asm volatile("cli; hlt");
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}
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}
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}
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