mirror of
https://github.com/LadybirdBrowser/ladybird.git
synced 2024-09-21 02:08:12 +03:00
6e19ab2bbc
We have a new, improved string type coming up in AK (OOM aware, no null state), and while it's going to use UTF-8, the name UTF8String is a mouthful - so let's free up the String name by renaming the existing class. Making the old one have an annoying name will hopefully also help with quick adoption :^)
588 lines
17 KiB
C++
588 lines
17 KiB
C++
/*
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* Copyright (c) 2021, Leon Albrecht <leon2002.la@gmail.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include "Report.h"
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#include <AK/Concepts.h>
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#include <AK/FPControl.h>
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#include <AK/SIMD.h>
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#include <LibX86/Instruction.h>
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#include <LibX86/Interpreter.h>
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#include <math.h>
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#include <string.h>
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namespace UserspaceEmulator {
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using namespace AK::SIMD;
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using AK::RoundingMode;
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class Emulator;
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class SoftCPU;
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union MMX {
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u64 raw;
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c8x8 v8;
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i16x4 v16;
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i32x2 v32;
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u16x4 v16u;
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u32x2 v32u;
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};
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static_assert(AssertSize<MMX, sizeof(u64)>());
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class SoftFPU final {
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public:
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SoftFPU(Emulator& emulator, SoftCPU& cpu)
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: m_emulator(emulator)
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, m_cpu(cpu)
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, m_fpu_cw { 0x037F }
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{
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}
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ALWAYS_INLINE bool c0() const { return m_fpu_c0; }
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ALWAYS_INLINE bool c1() const { return m_fpu_c1; }
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ALWAYS_INLINE bool c2() const { return m_fpu_c2; }
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ALWAYS_INLINE bool c3() const { return m_fpu_c3; }
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ALWAYS_INLINE void set_c0(bool val) { m_fpu_c0 = val; }
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ALWAYS_INLINE void set_c1(bool val) { m_fpu_c1 = val; }
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ALWAYS_INLINE void set_c2(bool val) { m_fpu_c2 = val; }
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ALWAYS_INLINE void set_c3(bool val) { m_fpu_c3 = val; }
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long double fpu_get(u8 index);
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void fpu_push(long double value);
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long double fpu_pop();
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void fpu_set_absolute(u8 index, long double value);
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void fpu_set(u8 index, long double value);
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MMX mmx_get(u8 index) const;
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void mmx_set(u8 index, MMX value);
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private:
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friend class SoftCPU;
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Emulator& m_emulator;
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SoftCPU& m_cpu;
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enum class FPU_Exception : u8 {
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InvalidOperation,
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DenormalizedOperand,
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ZeroDivide,
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Overflow,
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Underflow,
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Precision,
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StackFault,
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};
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enum class FPU_Tag : u8 {
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Valid = 0b00,
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Zero = 0b01,
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Special = 0b10,
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Empty = 0b11
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};
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void fpu_dump_env()
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{
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reportln("Exceptions: #I:{} #D:{} #Z:{} #O:{} #U:{} #P:{} #SF:{} Summary:{}"sv,
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m_fpu_error_invalid,
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m_fpu_error_denorm,
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m_fpu_error_zero_div,
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m_fpu_error_overflow,
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m_fpu_error_underflow,
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m_fpu_error_precision,
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m_fpu_error_stackfault,
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m_fpu_error_summary);
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reportln("Masks: #I:{} #D:{} #Z:{} #O:{} #U:{} #P:{}"sv,
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m_fpu_cw.mask_invalid,
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m_fpu_cw.mask_denorm,
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m_fpu_cw.mask_zero_div,
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m_fpu_cw.mask_overflow,
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m_fpu_cw.mask_underflow,
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m_fpu_cw.mask_precision);
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reportln("C0:{} C1:{} C2:{} C3:{}"sv, c0(), c1(), c2(), c3());
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reportln("fpu-stacktop: {}"sv, m_fpu_stack_top);
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reportln("fpu-stack /w stacktop (real):"sv);
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for (u8 i = 0; i < 8; ++i) {
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reportln("\t{} ({}): fp {} ({}), mmx {:016x}"sv,
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i, (u8)((m_fpu_stack_top + i) % 8),
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m_storage[(m_fpu_stack_top + i) % 8].fp, fpu_is_set(i) ? "set" : "free",
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m_storage[(m_fpu_stack_top + i) % 8].mmx.raw);
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}
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}
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DeprecatedString fpu_exception_string(FPU_Exception ex)
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{
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switch (ex) {
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case FPU_Exception::StackFault:
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return "Stackfault";
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case FPU_Exception::InvalidOperation:
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return "Invalid Operation";
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case FPU_Exception::DenormalizedOperand:
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return "Denormalized Operand";
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case FPU_Exception::ZeroDivide:
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return "Divide by Zero";
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case FPU_Exception::Overflow:
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return "Overflow";
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case FPU_Exception::Underflow:
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return "Underflow";
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case FPU_Exception::Precision:
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return "Precision";
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}
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VERIFY_NOT_REACHED();
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}
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// FIXME: Technically we should check for exceptions after each insn, too,
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// this might be important for FLDENV, but otherwise it should
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// be fine this way
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void fpu_set_exception(FPU_Exception ex);
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ALWAYS_INLINE void fpu_set_stack_overflow()
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{
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reportln("Stack Overflow"sv);
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set_c1(1);
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fpu_set_exception(FPU_Exception::StackFault);
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}
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ALWAYS_INLINE void fpu_set_stack_underflow()
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{
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reportln("Stack Underflow"sv);
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set_c1(0);
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fpu_set_exception(FPU_Exception::StackFault);
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}
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constexpr FPU_Tag fpu_get_tag_absolute(u8 index) const
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{
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switch (index) {
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case 0:
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return FPU_Tag(m_fpu_status_0);
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case 1:
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return FPU_Tag(m_fpu_status_1);
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case 2:
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return FPU_Tag(m_fpu_status_2);
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case 3:
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return FPU_Tag(m_fpu_status_3);
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case 4:
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return FPU_Tag(m_fpu_status_4);
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case 5:
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return FPU_Tag(m_fpu_status_5);
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case 6:
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return FPU_Tag(m_fpu_status_6);
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case 7:
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return FPU_Tag(m_fpu_status_7);
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default:
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VERIFY_NOT_REACHED();
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}
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}
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constexpr FPU_Tag fpu_get_tag(u8 index) const
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{
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VERIFY(index < 8);
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return fpu_get_tag_absolute((m_fpu_stack_top + index) % 8);
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}
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ALWAYS_INLINE void fpu_set_tag_absolute(u8 index, FPU_Tag tag)
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{
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switch (index) {
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case 0:
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m_fpu_status_0 = (u8)tag;
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break;
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case 1:
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m_fpu_status_1 = (u8)tag;
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break;
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case 2:
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m_fpu_status_2 = (u8)tag;
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break;
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case 3:
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m_fpu_status_3 = (u8)tag;
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break;
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case 4:
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m_fpu_status_4 = (u8)tag;
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break;
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case 5:
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m_fpu_status_5 = (u8)tag;
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break;
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case 6:
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m_fpu_status_6 = (u8)tag;
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break;
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case 7:
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m_fpu_status_7 = (u8)tag;
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break;
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default:
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VERIFY_NOT_REACHED();
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}
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}
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ALWAYS_INLINE void fpu_set_tag(u8 index, FPU_Tag tag)
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{
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VERIFY(index < 8);
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fpu_set_tag_absolute((m_fpu_stack_top + index) % 8, tag);
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}
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ALWAYS_INLINE void set_tag_from_value_absolute(u8 index, long double val)
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{
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switch (fpclassify(val)) {
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case FP_ZERO:
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fpu_set_tag_absolute(index, FPU_Tag::Zero);
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break;
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case FP_NAN:
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case FP_INFINITE:
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case FP_SUBNORMAL:
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fpu_set_tag_absolute(index, FPU_Tag::Special);
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break;
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case FP_NORMAL:
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fpu_set_tag_absolute(index, FPU_Tag::Valid);
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break;
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default:
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VERIFY_NOT_REACHED();
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}
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}
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ALWAYS_INLINE void set_tag_from_value(u8 index, long double val)
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{
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set_tag_from_value_absolute((m_fpu_stack_top + index) % 8, val);
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}
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ALWAYS_INLINE bool fpu_isnan(u8 index)
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{
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return isnan(fpu_get(index));
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}
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ALWAYS_INLINE bool fpu_is_set(u8 index) const
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{
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return fpu_get_tag_absolute((m_fpu_stack_top + index) % 8) != FPU_Tag::Empty;
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}
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ALWAYS_INLINE RoundingMode fpu_get_round_mode() const
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{
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return m_fpu_cw.rounding_control;
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}
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template<Arithmetic T>
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T round_checked(long double);
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template<FloatingPoint T>
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T convert_checked(long double);
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ALWAYS_INLINE void fpu_set_unordered()
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{
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set_c0(1);
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set_c2(1);
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set_c3(1);
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}
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void warn_if_mmx_absolute(u8 index) const;
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void warn_if_fpu_absolute(u8 index) const;
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void mmx_common() { m_fpu_tw = 0; }
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bool m_reg_is_mmx[8] { false };
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union {
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long double fp;
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struct {
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MMX mmx;
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u16 __high;
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};
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} m_storage[8];
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AK::X87ControlWord m_fpu_cw;
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union {
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u16 m_fpu_sw { 0 };
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struct {
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u16 m_fpu_error_invalid : 1; // pre | IE -> #I (#IS, #IA)
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u16 m_fpu_error_denorm : 1; // pre | DE -> #D
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u16 m_fpu_error_zero_div : 1; // pre | ZE -> #Z
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u16 m_fpu_error_overflow : 1; // post| OE -> #O
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u16 m_fpu_error_underflow : 1; // post| UE -> #U
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u16 m_fpu_error_precision : 1; // post| PE -> #P
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u16 m_fpu_error_stackfault : 1; // SF
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u16 m_fpu_error_summary : 1;
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u16 m_fpu_c0 : 1;
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u16 m_fpu_c1 : 1;
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u16 m_fpu_c2 : 1;
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u16 m_fpu_stack_top : 3;
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u16 m_fpu_c3 : 1;
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u16 m_fpu_busy : 1;
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};
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};
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union {
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u16 m_fpu_tw { 0xFFFF };
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struct {
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u16 m_fpu_status_0 : 2;
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u16 m_fpu_status_1 : 2;
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u16 m_fpu_status_2 : 2;
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u16 m_fpu_status_3 : 2;
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u16 m_fpu_status_4 : 2;
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u16 m_fpu_status_5 : 2;
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u16 m_fpu_status_6 : 2;
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u16 m_fpu_status_7 : 2;
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};
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};
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u32 m_fpu_ip { 0 };
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u16 m_fpu_cs { 0 };
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u32 m_fpu_dp { 0 };
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u16 m_fpu_ds { 0 };
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u16 m_fpu_iop { 0 };
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// Instructions
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// DATA TRANSFER
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void FLD_RM32(const X86::Instruction&);
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void FLD_RM64(const X86::Instruction&);
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void FLD_RM80(const X86::Instruction&);
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void FST_RM32(const X86::Instruction&);
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void FST_RM64(const X86::Instruction&);
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void FSTP_RM32(const X86::Instruction&);
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void FSTP_RM64(const X86::Instruction&);
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void FSTP_RM80(const X86::Instruction&);
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void FILD_RM32(const X86::Instruction&);
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void FILD_RM16(const X86::Instruction&);
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void FILD_RM64(const X86::Instruction&);
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void FIST_RM16(const X86::Instruction&);
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void FIST_RM32(const X86::Instruction&);
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void FISTP_RM16(const X86::Instruction&);
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void FISTP_RM32(const X86::Instruction&);
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void FISTP_RM64(const X86::Instruction&);
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void FISTTP_RM16(const X86::Instruction&);
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void FISTTP_RM32(const X86::Instruction&);
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void FISTTP_RM64(const X86::Instruction&);
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void FBLD_M80(const X86::Instruction&);
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void FBSTP_M80(const X86::Instruction&);
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void FXCH(const X86::Instruction&);
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void FCMOVE(const X86::Instruction&);
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void FCMOVNE(const X86::Instruction&);
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void FCMOVB(const X86::Instruction&);
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void FCMOVBE(const X86::Instruction&);
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void FCMOVNB(const X86::Instruction&);
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void FCMOVNBE(const X86::Instruction&);
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void FCMOVU(const X86::Instruction&);
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void FCMOVNU(const X86::Instruction&);
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// BASIC ARITHMETIC
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void FADD_RM32(const X86::Instruction&);
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void FADD_RM64(const X86::Instruction&);
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void FADDP(const X86::Instruction&);
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void FIADD_RM16(const X86::Instruction&);
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void FIADD_RM32(const X86::Instruction&);
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void FSUB_RM32(const X86::Instruction&);
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void FSUB_RM64(const X86::Instruction&);
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void FSUBP(const X86::Instruction&);
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void FSUBR_RM32(const X86::Instruction&);
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void FSUBR_RM64(const X86::Instruction&);
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void FSUBRP(const X86::Instruction&);
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void FISUB_RM16(const X86::Instruction&);
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void FISUB_RM32(const X86::Instruction&);
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void FISUBR_RM16(const X86::Instruction&);
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void FISUBR_RM32(const X86::Instruction&);
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void FMUL_RM32(const X86::Instruction&);
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void FMUL_RM64(const X86::Instruction&);
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void FMULP(const X86::Instruction&);
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void FIMUL_RM16(const X86::Instruction&);
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void FIMUL_RM32(const X86::Instruction&);
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void FDIV_RM32(const X86::Instruction&);
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void FDIV_RM64(const X86::Instruction&);
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void FDIVP(const X86::Instruction&);
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void FDIVR_RM32(const X86::Instruction&);
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void FDIVR_RM64(const X86::Instruction&);
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void FDIVRP(const X86::Instruction&);
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void FIDIV_RM16(const X86::Instruction&);
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void FIDIV_RM32(const X86::Instruction&);
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void FIDIVR_RM16(const X86::Instruction&);
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void FIDIVR_RM32(const X86::Instruction&);
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void FPREM(const X86::Instruction&);
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void FPREM1(const X86::Instruction&);
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void FABS(const X86::Instruction&);
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void FCHS(const X86::Instruction&);
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void FRNDINT(const X86::Instruction&);
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void FSCALE(const X86::Instruction&);
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void FSQRT(const X86::Instruction&);
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void FXTRACT(const X86::Instruction&);
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// COMPARISON
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void FCOM_RM32(const X86::Instruction&);
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void FCOM_RM64(const X86::Instruction&);
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void FCOMP_RM32(const X86::Instruction&);
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void FCOMP_RM64(const X86::Instruction&);
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void FCOMPP(const X86::Instruction&);
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void FCOMI(const X86::Instruction&);
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void FCOMIP(const X86::Instruction&);
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void FUCOM(const X86::Instruction&);
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void FUCOMP(const X86::Instruction&);
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void FUCOMPP(const X86::Instruction&);
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void FUCOMI(const X86::Instruction&);
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void FUCOMIP(const X86::Instruction&);
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void FICOM_RM16(const X86::Instruction&);
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void FICOM_RM32(const X86::Instruction&);
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void FICOMP_RM16(const X86::Instruction&);
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void FICOMP_RM32(const X86::Instruction&);
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void FTST(const X86::Instruction&);
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void FXAM(const X86::Instruction&);
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// TRANSCENDENTAL
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void FSIN(const X86::Instruction&);
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void FCOS(const X86::Instruction&);
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void FSINCOS(const X86::Instruction&);
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void FPTAN(const X86::Instruction&);
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void FPATAN(const X86::Instruction&);
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void F2XM1(const X86::Instruction&);
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void FYL2X(const X86::Instruction&);
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void FYL2XP1(const X86::Instruction&);
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// CONSTANT LOAD
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void FLD1(const X86::Instruction&);
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void FLDZ(const X86::Instruction&);
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void FLDPI(const X86::Instruction&);
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void FLDL2E(const X86::Instruction&);
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void FLDLN2(const X86::Instruction&);
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void FLDL2T(const X86::Instruction&);
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void FLDLG2(const X86::Instruction&);
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// CONTROL
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void FINCSTP(const X86::Instruction&);
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void FDECSTP(const X86::Instruction&);
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void FFREE(const X86::Instruction&);
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void FFREEP(const X86::Instruction&); // undocumented
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// FIXME: Non N- versions?
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void FNINIT(const X86::Instruction&);
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void FNCLEX(const X86::Instruction&);
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void FNSTCW(const X86::Instruction&);
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void FLDCW(const X86::Instruction&);
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void FNSTENV(const X86::Instruction&);
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void FLDENV(const X86::Instruction&);
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void FNSAVE(const X86::Instruction&);
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void FRSTOR(const X86::Instruction&);
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void FNSTSW(const X86::Instruction&);
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void FNSTSW_AX(const X86::Instruction&);
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// FIXME: WAIT && FWAIT
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void FNOP(const X86::Instruction&);
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// FPU & SIMD MANAGEMENT
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// FIXME: FXSAVE && FXRSTOR
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// DO NOTHING?
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// FIXME: FENI, FDISI, FSETPM
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void FNENI(const X86::Instruction&);
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void FNDISI(const X86::Instruction&);
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void FNSETPM(const X86::Instruction&);
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// MMX
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// ARITHMETIC
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void PADDB_mm1_mm2m64(const X86::Instruction&);
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void PADDW_mm1_mm2m64(const X86::Instruction&);
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void PADDD_mm1_mm2m64(const X86::Instruction&);
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void PADDSB_mm1_mm2m64(const X86::Instruction&);
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void PADDSW_mm1_mm2m64(const X86::Instruction&);
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void PADDUSB_mm1_mm2m64(const X86::Instruction&);
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void PADDUSW_mm1_mm2m64(const X86::Instruction&);
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void PSUBB_mm1_mm2m64(const X86::Instruction&);
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void PSUBW_mm1_mm2m64(const X86::Instruction&);
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void PSUBD_mm1_mm2m64(const X86::Instruction&);
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void PSUBSB_mm1_mm2m64(const X86::Instruction&);
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void PSUBSW_mm1_mm2m64(const X86::Instruction&);
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void PSUBUSB_mm1_mm2m64(const X86::Instruction&);
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void PSUBUSW_mm1_mm2m64(const X86::Instruction&);
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void PMULHW_mm1_mm2m64(const X86::Instruction&);
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void PMULLW_mm1_mm2m64(const X86::Instruction&);
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void PMADDWD_mm1_mm2m64(const X86::Instruction&);
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// COMPARISON
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void PCMPEQB_mm1_mm2m64(const X86::Instruction&);
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void PCMPEQW_mm1_mm2m64(const X86::Instruction&);
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void PCMPEQD_mm1_mm2m64(const X86::Instruction&);
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void PCMPGTB_mm1_mm2m64(const X86::Instruction&);
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void PCMPGTW_mm1_mm2m64(const X86::Instruction&);
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void PCMPGTD_mm1_mm2m64(const X86::Instruction&);
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// CONVERSION
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void PACKSSDW_mm1_mm2m64(const X86::Instruction&);
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void PACKSSWB_mm1_mm2m64(const X86::Instruction&);
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void PACKUSWB_mm1_mm2m64(const X86::Instruction&);
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// UNPACK
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void PUNPCKHBW_mm1_mm2m64(const X86::Instruction&);
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void PUNPCKHWD_mm1_mm2m64(const X86::Instruction&);
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void PUNPCKHDQ_mm1_mm2m64(const X86::Instruction&);
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void PUNPCKLBW_mm1_mm2m32(const X86::Instruction&);
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void PUNPCKLWD_mm1_mm2m32(const X86::Instruction&);
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void PUNPCKLDQ_mm1_mm2m32(const X86::Instruction&);
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// LOGICAL
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void PAND_mm1_mm2m64(const X86::Instruction&);
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void PANDN_mm1_mm2m64(const X86::Instruction&);
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void POR_mm1_mm2m64(const X86::Instruction&);
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void PXOR_mm1_mm2m64(const X86::Instruction&);
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// SHIFT
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void PSLLW_mm1_mm2m64(const X86::Instruction&);
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void PSLLW_mm1_imm8(const X86::Instruction&);
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void PSLLD_mm1_mm2m64(const X86::Instruction&);
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void PSLLD_mm1_imm8(const X86::Instruction&);
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void PSLLQ_mm1_mm2m64(const X86::Instruction&);
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void PSLLQ_mm1_imm8(const X86::Instruction&);
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void PSRAW_mm1_mm2m64(const X86::Instruction&);
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void PSRAW_mm1_imm8(const X86::Instruction&);
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void PSRAD_mm1_mm2m64(const X86::Instruction&);
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void PSRAD_mm1_imm8(const X86::Instruction&);
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void PSRLW_mm1_mm2m64(const X86::Instruction&);
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void PSRLW_mm1_imm8(const X86::Instruction&);
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void PSRLD_mm1_mm2m64(const X86::Instruction&);
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void PSRLD_mm1_imm8(const X86::Instruction&);
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void PSRLQ_mm1_mm2m64(const X86::Instruction&);
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void PSRLQ_mm1_imm8(const X86::Instruction&);
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// DATA TRANSFER
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void MOVD_mm1_rm32(const X86::Instruction&);
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void MOVD_rm32_mm2(const X86::Instruction&);
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void MOVQ_mm1_mm2m64(const X86::Instruction&);
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void MOVQ_mm1m64_mm2(const X86::Instruction&);
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void MOVQ_mm1_rm64(const X86::Instruction&); // long mode
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void MOVQ_rm64_mm2(const X86::Instruction&); // long mode
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// EMPTY MMX STATE
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void EMMS(const X86::Instruction&);
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};
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}
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