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b91df26d4a
If we are in a shared interrupt handler, the called handlers might indicate it was not their interrupt, so we should not increment the call counter of these handlers.
458 lines
17 KiB
C++
458 lines
17 KiB
C++
/*
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* Copyright (c) 2021, the SerenityOS developers.
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <AK/MACAddress.h>
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#include <Kernel/Debug.h>
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#include <Kernel/IO.h>
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#include <Kernel/Net/NE2000NetworkAdapter.h>
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namespace Kernel {
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/**
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* The NE2000 is an ancient 10 Mib/s Ethernet network card standard by Novell
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* from the late 80s. Based on National Semiconductor's DP8390 Ethernet chip
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* or compatible, they were known to be extremely bare-bones but also very
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* cheap entry-level cards.
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*
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* QEMU supports them with the ne2k_{isa,pci} devices, physical incarnations
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* were available from different manufacturers for the ISA bus and later on
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* the PCI bus, including:
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* - Realtek's RTL8029
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* - VIA Technologies, Inc.'s VT86C926
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*
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* Official documentation from National Semiconductor includes:
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* - Datasheet "DP8390D/NS32490D NIC Network Interface Controller"
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* - Application Note 874 "Writing Drivers for the DP8390 NIC Family of Ethernet Controllers"
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*
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* This driver supports only the PCI variant.
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*
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* Remember, friends don't let friends use NE2000 network cards :^)
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*/
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// Page 0 registers
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static constexpr u8 REG_RW_COMMAND = 0x00;
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static constexpr u8 BIT_COMMAND_STOP = (0b1 << 0);
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static constexpr u8 BIT_COMMAND_START = (0b1 << 1);
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static constexpr u8 BIT_COMMAND_TXP = (0b1 << 2);
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static constexpr u8 BIT_COMMAND_DMA_READ = (0b001 << 3);
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static constexpr u8 BIT_COMMAND_DMA_WRITE = (0b010 << 3);
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static constexpr u8 BIT_COMMAND_DMA_SEND = (0b011 << 3);
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static constexpr u8 BIT_COMMAND_DMA_ABORT = (0b100 << 3);
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static constexpr u8 BIT_COMMAND_DMA_FIELD = (0b111 << 3);
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static constexpr u8 BIT_COMMAND_PAGE1 = (0b01 << 6);
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static constexpr u8 BIT_COMMAND_PAGE2 = (0b10 << 6);
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static constexpr u8 BIT_COMMAND_PAGE_FIELD = (0b11 << 6);
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static constexpr u8 REG_WR_PAGESTART = 0x01;
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static constexpr u8 REG_WR_PAGESTOP = 0x02;
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static constexpr u8 REG_RW_BOUNDARY = 0x03;
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static constexpr u8 REG_RD_TRANSMITSTATUS = 0x04;
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static constexpr u8 REG_WR_TRANSMITPAGE = 0x04;
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static constexpr u8 REG_RD_NCR = 0x05;
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static constexpr u8 REG_WR_TRANSMITBYTECOUNT0 = 0x05;
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static constexpr u8 REG_WR_TRANSMITBYTECOUNT1 = 0x06;
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static constexpr u8 REG_RW_INTERRUPTSTATUS = 0x07;
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static constexpr u8 REG_RD_CRDMA0 = 0x08;
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static constexpr u8 REG_WR_REMOTESTARTADDRESS0 = 0x08;
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static constexpr u8 REG_RD_CRDMA1 = 0x09;
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static constexpr u8 REG_WR_REMOTESTARTADDRESS1 = 0x09;
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static constexpr u8 REG_WR_REMOTEBYTECOUNT0 = 0x0a;
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static constexpr u8 REG_WR_REMOTEBYTECOUNT1 = 0x0b;
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static constexpr u8 REG_RD_RECEIVESTATUS = 0x0c;
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static constexpr u8 BIT_RECEIVESTATUS_PRX = (0b1 << 0);
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static constexpr u8 BIT_RECEIVESTATUS_CRC = (0b1 << 1);
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static constexpr u8 BIT_RECEIVESTATUS_FAE = (0b1 << 2);
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static constexpr u8 BIT_RECEIVESTATUS_FO = (0b1 << 3);
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static constexpr u8 BIT_RECEIVESTATUS_MPA = (0b1 << 4);
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static constexpr u8 REG_WR_RECEIVECONFIGURATION = 0x0c;
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static constexpr u8 BIT_RECEIVECONFIGURATION_SEP = (0b1 << 0);
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static constexpr u8 BIT_RECEIVECONFIGURATION_AR = (0b1 << 1);
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static constexpr u8 BIT_RECEIVECONFIGURATION_AB = (0b1 << 2);
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static constexpr u8 BIT_RECEIVECONFIGURATION_AM = (0b1 << 3);
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static constexpr u8 BIT_RECEIVECONFIGURATION_PRO = (0b1 << 4);
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static constexpr u8 BIT_RECEIVECONFIGURATION_MON = (0b1 << 5);
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static constexpr u8 REG_RD_FAE_TALLY = 0x0d;
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static constexpr u8 REG_WR_TRANSMITCONFIGURATION = 0x0d;
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static constexpr u8 BIT_WR_TRANSMITCONFIGURATION_LOOPBACK = (0b10 << 0);
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static constexpr u8 REG_RD_CRC_TALLY = 0x0e;
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static constexpr u8 REG_WR_DATACONFIGURATION = 0x0e;
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static constexpr u8 BIT_DATACONFIGURATION_WTS = (0b1 << 0);
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static constexpr u8 BIT_DATACONFIGURATION_BOS = (0b1 << 1);
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static constexpr u8 BIT_DATACONFIGURATION_LS = (0b1 << 2);
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static constexpr u8 BIT_DATACONFIGURATION_FIFO_8B = (0b10 << 5);
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static constexpr u8 REG_RD_MISS_PKT_TALLY = 0x0f;
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static constexpr u8 REG_WR_INTERRUPTMASK = 0x0f;
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static constexpr u8 BIT_INTERRUPTMASK_PRX = (0b1 << 0);
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static constexpr u8 BIT_INTERRUPTMASK_PTX = (0b1 << 1);
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static constexpr u8 BIT_INTERRUPTMASK_RXE = (0b1 << 2);
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static constexpr u8 BIT_INTERRUPTMASK_TXE = (0b1 << 3);
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static constexpr u8 BIT_INTERRUPTMASK_OVW = (0b1 << 4);
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static constexpr u8 BIT_INTERRUPTMASK_CNT = (0b1 << 5);
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static constexpr u8 BIT_INTERRUPTMASK_RDC = (0b1 << 6);
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static constexpr u8 BIT_INTERRUPTMASK_RST = (0b1 << 7);
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static constexpr u8 REG_RW_IOPORT = 0x10;
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// Page 1 registers
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static constexpr u8 REG_RW_PHYSICALADDRESS0 = 0x01;
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static constexpr u8 REG_RW_CURRENT = 0x07;
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static constexpr int NE2K_PAGE_SIZE = 256;
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static constexpr int NE2K_RAM_BEGIN = 16384;
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static constexpr int NE2K_RAM_END = 32768;
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static constexpr int NE2K_RAM_SIZE = NE2K_RAM_END - NE2K_RAM_BEGIN;
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static constexpr int NE2K_RAM_SEND_BEGIN = 16384;
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static constexpr int NE2K_RAM_SEND_END = 16384 + 6 * 256;
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static constexpr int NE2K_RAM_SEND_SIZE = NE2K_RAM_SEND_END - NE2K_RAM_SEND_BEGIN;
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static constexpr int NE2K_RAM_RECV_BEGIN = NE2K_RAM_SEND_END;
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static constexpr int NE2K_RAM_RECV_END = NE2K_RAM_END;
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static constexpr int NE2K_RAM_RECV_SIZE = NE2K_RAM_RECV_END - NE2K_RAM_RECV_BEGIN;
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static_assert(NE2K_RAM_BEGIN % NE2K_PAGE_SIZE == 0);
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static_assert(NE2K_RAM_END % NE2K_PAGE_SIZE == 0);
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static_assert(NE2K_RAM_SEND_BEGIN % NE2K_PAGE_SIZE == 0);
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static_assert(NE2K_RAM_SEND_END % NE2K_PAGE_SIZE == 0);
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static_assert(NE2K_RAM_RECV_BEGIN % NE2K_PAGE_SIZE == 0);
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static_assert(NE2K_RAM_RECV_END % NE2K_PAGE_SIZE == 0);
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struct [[gnu::packed]] received_packet_header {
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u8 status;
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u8 next_packet_page;
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u16 length;
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};
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UNMAP_AFTER_INIT RefPtr<NE2000NetworkAdapter> NE2000NetworkAdapter::try_to_initialize(PCI::Address address)
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{
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constexpr auto ne2k_ids = Array {
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PCI::ID { 0x10EC, 0x8029 }, // RealTek RTL-8029(AS)
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// List of clones, taken from Linux's ne2k-pci.c
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PCI::ID { 0x1050, 0x0940 }, // Winbond 89C940
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PCI::ID { 0x11f6, 0x1401 }, // Compex RL2000
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PCI::ID { 0x8e2e, 0x3000 }, // KTI ET32P2
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PCI::ID { 0x4a14, 0x5000 }, // NetVin NV5000SC
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PCI::ID { 0x1106, 0x0926 }, // Via 86C926
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PCI::ID { 0x10bd, 0x0e34 }, // SureCom NE34
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PCI::ID { 0x1050, 0x5a5a }, // Winbond W89C940F
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PCI::ID { 0x12c3, 0x0058 }, // Holtek HT80232
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PCI::ID { 0x12c3, 0x5598 }, // Holtek HT80229
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PCI::ID { 0x8c4a, 0x1980 }, // Winbond W89C940 (misprogrammed)
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};
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auto id = PCI::get_id(address);
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if (!ne2k_ids.span().contains_slow(id))
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return {};
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u8 irq = PCI::get_interrupt_line(address);
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return adopt_ref_if_nonnull(new NE2000NetworkAdapter(address, irq));
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}
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UNMAP_AFTER_INIT NE2000NetworkAdapter::NE2000NetworkAdapter(PCI::Address address, u8 irq)
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: PCI::Device(address, irq)
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, m_io_base(PCI::get_BAR0(pci_address()) & ~3)
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{
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set_interface_name(address);
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dmesgln("NE2000: Found @ {}", pci_address());
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m_interrupt_line = PCI::get_interrupt_line(pci_address());
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dmesgln("NE2000: Port base: {}", m_io_base);
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dmesgln("NE2000: Interrupt line: {}", m_interrupt_line);
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int ram_errors = ram_test();
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dmesgln("NE2000: RAM test {}, got {} byte errors", (ram_errors == 0 ? "OK" : "KO"), ram_errors);
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reset();
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set_mac_address(m_mac_address);
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dmesgln("NE2000: MAC address: {}", m_mac_address.to_string().characters());
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enable_irq();
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}
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UNMAP_AFTER_INIT NE2000NetworkAdapter::~NE2000NetworkAdapter()
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{
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}
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bool NE2000NetworkAdapter::handle_irq(const RegisterState&)
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{
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u8 status = in8(REG_RW_INTERRUPTSTATUS);
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dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: Got interrupt, status={:#02x}", status);
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if (status == 0) {
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return false;
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}
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if (status & BIT_INTERRUPTMASK_PRX) {
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dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: Interrupt for packet received");
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}
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if (status & BIT_INTERRUPTMASK_PTX) {
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dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: Interrupt for packet sent");
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}
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if (status & BIT_INTERRUPTMASK_RXE) {
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u8 fae = in8(REG_RD_FAE_TALLY);
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u8 crc = in8(REG_RD_CRC_TALLY);
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u8 miss = in8(REG_RD_MISS_PKT_TALLY);
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dmesgln("NE2000NetworkAdapter: Packet reception error framing={} crc={} missed={}", fae, crc, miss);
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// TODO: handle counters
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}
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if (status & BIT_INTERRUPTMASK_TXE) {
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dmesgln("NE2000NetworkAdapter: Packet transmission error");
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}
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if (status & BIT_INTERRUPTMASK_OVW) {
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dmesgln("NE2000NetworkAdapter: Ring buffer reception overflow error");
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// TODO: handle counters
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}
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if (status & BIT_INTERRUPTMASK_CNT) {
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dmesgln("NE2000NetworkAdapter: Counter overflow error");
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// TODO: handle counters
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}
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if (status & BIT_INTERRUPTMASK_RST) {
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dmesgln("NE2000NetworkAdapter: NIC requires reset due to packet reception overflow");
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// TODO: proper reset procedure
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reset();
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}
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receive();
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m_wait_queue.wake_all();
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out8(REG_RW_INTERRUPTSTATUS, status);
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return true;
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}
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UNMAP_AFTER_INIT int NE2000NetworkAdapter::ram_test()
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{
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IOAddress io(PCI::get_BAR0(pci_address()) & ~3);
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int errors = 0;
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out8(REG_RW_COMMAND, BIT_COMMAND_DMA_ABORT | BIT_COMMAND_STOP);
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#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
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out8(REG_WR_DATACONFIGURATION, BIT_DATACONFIGURATION_FIFO_8B | BIT_DATACONFIGURATION_WTS);
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#elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
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out8(REG_WR_DATACONFIGURATION, BIT_DATACONFIGURATION_FIFO_8B | BIT_DATACONFIGURATION_BOS | BIT_DATACONFIGURATION_WTS);
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#else
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# error Unknown byte order
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#endif
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out8(REG_WR_REMOTEBYTECOUNT0, 0x00);
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out8(REG_WR_REMOTEBYTECOUNT1, 0x00);
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out8(REG_WR_RECEIVECONFIGURATION, BIT_RECEIVECONFIGURATION_MON);
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out8(REG_RW_COMMAND, BIT_COMMAND_DMA_ABORT | BIT_COMMAND_START);
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auto buffer = ByteBuffer::create_uninitialized(NE2K_RAM_SIZE);
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const u8 patterns[3] = { 0x5a, 0xff, 0x00 };
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for (int i = 0; i < 3; ++i) {
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for (size_t j = 0; j < buffer.size(); ++j)
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buffer[j] = patterns[i];
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rdma_write(NE2K_RAM_BEGIN, buffer);
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rdma_read(NE2K_RAM_BEGIN, buffer);
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for (size_t j = 0; j < buffer.size(); ++j) {
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if (buffer[j] != patterns[i]) {
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if (errors < 16)
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dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: Bad adapter RAM @ {} expected={} got={}", PhysicalAddress(NE2K_RAM_BEGIN + j), patterns[i], buffer[j]);
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else if (errors == 16)
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dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: Too many RAM errors, silencing further output");
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errors++;
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}
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}
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}
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return errors;
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}
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void NE2000NetworkAdapter::reset()
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{
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const u8 interrupt_mask = BIT_INTERRUPTMASK_PRX | BIT_INTERRUPTMASK_PTX | BIT_INTERRUPTMASK_RXE | BIT_INTERRUPTMASK_TXE | BIT_INTERRUPTMASK_OVW | BIT_INTERRUPTMASK_CNT;
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u8 prom[32];
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// Taken from DP8390D's datasheet section 11.0, "Initialization Procedures"
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out8(REG_RW_COMMAND, BIT_COMMAND_DMA_ABORT | BIT_COMMAND_STOP);
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#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
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out8(REG_WR_DATACONFIGURATION, BIT_DATACONFIGURATION_FIFO_8B | BIT_DATACONFIGURATION_WTS);
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#elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
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out8(REG_WR_DATACONFIGURATION, BIT_DATACONFIGURATION_FIFO_8B | BIT_DATACONFIGURATION_BOS | BIT_DATACONFIGURATION_WTS);
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#else
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# error Unknown byte order
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#endif
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out8(REG_WR_REMOTEBYTECOUNT0, 0x00);
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out8(REG_WR_REMOTEBYTECOUNT1, 0x00);
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out8(REG_WR_RECEIVECONFIGURATION, BIT_RECEIVECONFIGURATION_AB | BIT_RECEIVECONFIGURATION_AR);
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out8(REG_WR_TRANSMITCONFIGURATION, BIT_WR_TRANSMITCONFIGURATION_LOOPBACK);
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m_ring_read_ptr = NE2K_RAM_RECV_BEGIN >> 8;
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out8(REG_WR_PAGESTART, NE2K_RAM_RECV_BEGIN >> 8);
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out8(REG_RW_BOUNDARY, NE2K_RAM_RECV_BEGIN >> 8);
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out8(REG_WR_PAGESTOP, NE2K_RAM_RECV_END >> 8);
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out8(REG_RW_INTERRUPTSTATUS, 0xff);
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out8(REG_WR_INTERRUPTMASK, interrupt_mask);
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rdma_read(0, Bytes(prom, sizeof(prom)));
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for (int i = 0; i < 6; i++) {
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m_mac_address[i] = prom[i * 2];
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}
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out8(REG_RW_COMMAND, BIT_COMMAND_PAGE1 | BIT_COMMAND_DMA_ABORT | BIT_COMMAND_STOP);
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for (int i = 0; i < 6; i++) {
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out8(REG_RW_PHYSICALADDRESS0 + i, m_mac_address[i]);
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}
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out8(REG_RW_CURRENT, NE2K_RAM_RECV_BEGIN >> 8);
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out8(REG_RW_COMMAND, BIT_COMMAND_DMA_ABORT | BIT_COMMAND_START);
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out8(REG_WR_TRANSMITCONFIGURATION, 0xe0);
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}
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void NE2000NetworkAdapter::rdma_read(size_t address, Bytes payload)
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{
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dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: DMA read @ {} length={}", PhysicalAddress(address), payload.size());
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u8 command = in8(REG_RW_COMMAND) & ~(BIT_COMMAND_PAGE_FIELD | BIT_COMMAND_DMA_FIELD);
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out8(REG_RW_COMMAND, command | BIT_COMMAND_DMA_ABORT);
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out8(REG_RW_INTERRUPTSTATUS, BIT_INTERRUPTMASK_RDC);
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out8(REG_WR_REMOTEBYTECOUNT0, payload.size());
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out8(REG_WR_REMOTEBYTECOUNT1, payload.size() >> 8);
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out8(REG_WR_REMOTESTARTADDRESS0, address);
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out8(REG_WR_REMOTESTARTADDRESS1, address >> 8);
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command = in8(REG_RW_COMMAND) & ~(BIT_COMMAND_DMA_FIELD);
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out8(REG_RW_COMMAND, command | BIT_COMMAND_DMA_READ);
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for (size_t i = 0; i < payload.size(); i += 2) {
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u16 data = in16(REG_RW_IOPORT);
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payload[i] = data;
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if (i != payload.size() - 1)
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payload[i + 1] = data >> 8;
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}
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while (!(in8(REG_RW_INTERRUPTSTATUS) & BIT_INTERRUPTMASK_RDC))
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;
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}
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void NE2000NetworkAdapter::rdma_write(size_t address, ReadonlyBytes payload)
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{
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dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: DMA write @ {} length={}", PhysicalAddress(address), payload.size());
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u8 command = in8(REG_RW_COMMAND) & ~(BIT_COMMAND_PAGE_FIELD | BIT_COMMAND_DMA_FIELD);
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out8(REG_RW_COMMAND, command | BIT_COMMAND_DMA_ABORT);
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out8(REG_RW_INTERRUPTSTATUS, BIT_INTERRUPTMASK_RDC);
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out8(REG_WR_REMOTEBYTECOUNT0, payload.size());
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out8(REG_WR_REMOTEBYTECOUNT1, payload.size() >> 8);
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out8(REG_WR_REMOTESTARTADDRESS0, address);
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out8(REG_WR_REMOTESTARTADDRESS1, address >> 8);
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command = in8(REG_RW_COMMAND) & ~(BIT_COMMAND_DMA_FIELD);
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out8(REG_RW_COMMAND, command | BIT_COMMAND_DMA_WRITE);
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for (size_t i = 0; i < payload.size(); i += 2) {
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u16 data = payload[i];
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if (i != payload.size() - 1)
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data |= payload[i + 1] << 8;
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out16(REG_RW_IOPORT, data);
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}
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while (!(in8(REG_RW_INTERRUPTSTATUS) & BIT_INTERRUPTMASK_RDC))
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;
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}
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void NE2000NetworkAdapter::send_raw(ReadonlyBytes payload)
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{
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dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: Sending packet length={}", payload.size());
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if (payload.size() > NE2K_RAM_SEND_SIZE) {
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dmesgln("NE2000NetworkAdapter: Packet to send was too big; discarding");
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return;
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}
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while (in8(REG_RW_COMMAND) & BIT_COMMAND_TXP)
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m_wait_queue.wait_forever("NE2000NetworkAdapter");
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disable_irq();
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size_t packet_size = payload.size();
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if (packet_size < 64)
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packet_size = 64;
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rdma_write(NE2K_RAM_SEND_BEGIN, payload);
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out8(REG_WR_TRANSMITPAGE, NE2K_RAM_SEND_BEGIN >> 8);
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out8(REG_WR_TRANSMITBYTECOUNT0, packet_size);
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out8(REG_WR_TRANSMITBYTECOUNT1, packet_size >> 8);
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out8(REG_RW_COMMAND, BIT_COMMAND_DMA_ABORT | BIT_COMMAND_TXP | BIT_COMMAND_START);
|
|
|
|
dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: Packet submitted for transmission");
|
|
|
|
enable_irq();
|
|
}
|
|
|
|
void NE2000NetworkAdapter::receive()
|
|
{
|
|
while (true) {
|
|
out8(REG_RW_COMMAND, BIT_COMMAND_PAGE1 | in8(REG_RW_COMMAND));
|
|
u8 current = in8(REG_RW_CURRENT);
|
|
out8(REG_RW_COMMAND, in8(REG_RW_COMMAND) & ~BIT_COMMAND_PAGE_FIELD);
|
|
if (m_ring_read_ptr == current)
|
|
break;
|
|
|
|
size_t header_address = m_ring_read_ptr << 8;
|
|
received_packet_header header;
|
|
rdma_read(header_address, Bytes(reinterpret_cast<u8*>(&header), sizeof(header)));
|
|
|
|
bool packet_ok = header.status & BIT_RECEIVESTATUS_PRX;
|
|
dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: Packet received {} length={}", (packet_ok ? "intact" : "damaged"), header.length);
|
|
|
|
if (packet_ok) {
|
|
auto packet = NetworkByteBuffer::create_uninitialized(sizeof(received_packet_header) + header.length);
|
|
int bytes_left = packet.size();
|
|
int current_offset = 0;
|
|
int ring_offset = header_address;
|
|
|
|
while (bytes_left > 0) {
|
|
int copy_size = min(bytes_left, NE2K_PAGE_SIZE);
|
|
rdma_read(ring_offset, packet.span().slice(current_offset, copy_size));
|
|
current_offset += copy_size;
|
|
ring_offset += copy_size;
|
|
bytes_left -= copy_size;
|
|
if (ring_offset == NE2K_RAM_RECV_END)
|
|
ring_offset = NE2K_RAM_RECV_BEGIN;
|
|
}
|
|
|
|
did_receive(packet.span().slice(sizeof(received_packet_header)));
|
|
}
|
|
|
|
if (header.next_packet_page == NE2K_RAM_RECV_BEGIN)
|
|
out8(REG_RW_BOUNDARY, (NE2K_RAM_RECV_END >> 8) - 1);
|
|
else
|
|
out8(REG_RW_BOUNDARY, header.next_packet_page - 1);
|
|
m_ring_read_ptr = header.next_packet_page;
|
|
}
|
|
}
|
|
|
|
void NE2000NetworkAdapter::out8(u16 address, u8 data)
|
|
{
|
|
m_io_base.offset(address).out(data);
|
|
}
|
|
|
|
void NE2000NetworkAdapter::out16(u16 address, u16 data)
|
|
{
|
|
m_io_base.offset(address).out(data);
|
|
}
|
|
|
|
u8 NE2000NetworkAdapter::in8(u16 address)
|
|
{
|
|
u8 data = m_io_base.offset(address).in<u8>();
|
|
return data;
|
|
}
|
|
|
|
u16 NE2000NetworkAdapter::in16(u16 address)
|
|
{
|
|
return m_io_base.offset(address).in<u16>();
|
|
}
|
|
|
|
}
|