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https://github.com/LadybirdBrowser/ladybird.git
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79ffdb7205
- More work on funneling console output through Console. - init() now breaks off into a separate task ASAP. - ..this leaves the "colonel" task as a simple hlt idle loop. - Mask all IRQs on startup (except IRQ2 for slave passthru) - Fix underallocation bug in Task::allocateRegion(). - Remember how many times each Task has been scheduled. The panel and scheduling banner are disabled until I get things working nicely in the (brave) new Console world.
104 lines
2.2 KiB
C++
104 lines
2.2 KiB
C++
#include "types.h"
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#include "i386.h"
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#include "IO.h"
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#include "VGA.h"
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#include "PIC.h"
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#include "Assertions.h"
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// The slave 8259 is connected to the master's IRQ2 line.
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// This is really only to enhance clarity.
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#define SLAVE_INDEX 2
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#define PIC0_CTL 0x20
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#define PIC0_CMD 0x21
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#define PIC1_CTL 0xA0
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#define PIC1_CMD 0xA1
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#ifdef DEBUG_PIC
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static bool initialized;
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#endif
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namespace PIC {
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void disable(BYTE irq)
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{
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BYTE imr;
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if (irq & 8) {
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imr = IO::in8(PIC1_CMD);
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imr |= 1 << (irq - 8);
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IO::out8(PIC1_CMD, imr);
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} else {
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imr = IO::in8(PIC0_CMD);
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imr |= 1 << irq;
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IO::out8(PIC0_CMD, imr);
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}
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}
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void enable(BYTE irq)
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{
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BYTE imr;
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if (irq & 8) {
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imr = IO::in8(PIC1_CMD);
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imr &= ~(1 << (irq - 8));
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IO::out8(PIC1_CMD, imr);
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} else {
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imr = IO::in8(PIC0_CMD);
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imr &= ~(1 << irq);
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IO::out8(PIC0_CMD, imr);
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}
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}
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void eoi(BYTE irq)
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{
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if (irq & 8)
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IO::out8(PIC1_CTL, 0x20);
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IO::out8(PIC0_CTL, 0x20);
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}
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void initialize()
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{
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#ifdef DEBUG_PIC
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ASSERT(!initialized);
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#endif
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/* ICW1 (edge triggered mode, cascading controllers, expect ICW4) */
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IO::out8(PIC0_CTL, 0x11);
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IO::out8(PIC1_CTL, 0x11);
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/* ICW2 (upper 5 bits specify ISR indices, lower 3 idunno) */
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IO::out8(PIC0_CMD, IRQ_VECTOR_BASE);
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IO::out8(PIC1_CMD, IRQ_VECTOR_BASE + 0x08);
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/* ICW3 (configure master/slave relationship) */
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IO::out8(PIC0_CMD, 1 << SLAVE_INDEX);
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IO::out8(PIC1_CMD, SLAVE_INDEX);
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/* ICW4 (set x86 mode) */
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IO::out8(PIC0_CMD, 0x01);
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IO::out8(PIC1_CMD, 0x01 );
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// Mask -- start out with all IRQs disabled.
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IO::out8(PIC0_CMD, 0xff);
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IO::out8(PIC1_CMD, 0xff);
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// ...except IRQ2, since that's needed for the master to let through slave interrupts.
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enable(2);
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kprintf("PIC(i8259): cascading mode, vectors 0x%b-0x%b\n", IRQ_VECTOR_BASE, IRQ_VECTOR_BASE + 0x08);
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#ifdef DEBUG_PIC
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initialized = true;
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#endif
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}
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word getISR()
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{
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IO::out8(PIC0_CTL, 0x0b);
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IO::out8(PIC1_CTL, 0x0b);
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byte isr0 = IO::in8(PIC0_CTL);
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byte isr1 = IO::in8(PIC1_CTL);
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return (isr1 << 8) | isr0;
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}
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}
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