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29 lines
413 B
Makefile
29 lines
413 B
Makefile
include ../Makefile.common
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SRCS = $(wildcard *.cpp)
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OBJS = ${SRCS:.cpp=.o}
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APPS = ${SRCS:.cpp=}
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DEFINES += -DUSERLAND
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.PHONY: all list clean
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all: $(OBJS) $(APPS)
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list:
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@echo $(APPS)
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clean:
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@echo "CLEAN"
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@rm -f $(APPS) $(OBJS) *.d
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$(APPS) : % : %.o $(OBJS)
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@echo "LD $@"
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@$(LD) -o $@ $(LDFLAGS) $< -lc -lgui -lcore
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%.o: %.cpp
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@echo "CXX $<"
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@$(CXX) $(CXXFLAGS) -o $@ -c $<
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-include $(OBJS:%.o=%.d)
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