Tom 6e46e21c42 Kernel: Implement Page Attribute Table (PAT) support and Write-Combine ... This allows us to enable Write-Combine on e.g. framebuffers, significantly improving performance on bare metal. To keep things simple we right now only use one of up to three bits (bit 7 in the PTE), which maps to the PA4 entry in the PAT MSR, which we set to the Write-Combine mode on each CPU at boot time.		2022-01-26 09:21:04 +02:00
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aarch64	Kernel: Extract ProcessorSpecificDataID from from Arch/Processor.h	2021-12-11 13:23:27 -08:00
x86	Kernel: Implement Page Attribute Table (PAT) support and Write-Combine	2022-01-26 09:21:04 +02:00
DeferredCallEntry.h	Kernel: Extract DeferredCallEntry from Arch/Processor.h	2021-12-11 13:23:27 -08:00
Processor.h	Kernel: Move architecture dependent includes to the top in Processor.h	2021-12-11 13:23:27 -08:00
ProcessorSpecificDataID.h	Kernel: Extract ProcessorSpecificDataID from from Arch/Processor.h	2021-12-11 13:23:27 -08:00
RegisterState.h	Kernel: Add cross platform RegisterState header and Aarch64 version	2021-10-15 21:48:45 +01:00
ScopedCritical.h	Kernel: Split ScopedCritical so header is platform independent	2021-10-15 21:48:45 +01:00
SmapDisabler.h	Kernel: Split SmapDisabler so header is platform independent	2021-10-15 21:48:45 +01:00
Spinlock.h	Kernel: Move spinlock into Arch	2021-10-15 21:48:45 +01:00