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bc107d0b33
We can now properly initialize all processors without crashing by sending SMP IPI messages to synchronize memory between processors. We now initialize the APs once we have the scheduler running. This is so that we can process IPI messages from the other cores. Also rework interrupt handling a bit so that it's more of a 1:1 mapping. We need to allocate non-sharable interrupts for IPIs. This also fixes the occasional hang/crash because all CPUs now synchronize memory with each other.
237 lines
9.0 KiB
C++
237 lines
9.0 KiB
C++
/*
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* Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <AK/FixedArray.h>
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#include <AK/StringView.h>
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#include <Kernel/ACPI/MultiProcessorParser.h>
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#include <Kernel/Arch/i386/CPU.h>
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#include <Kernel/CommandLine.h>
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#include <Kernel/IO.h>
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#include <Kernel/Interrupts/APIC.h>
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#include <Kernel/Interrupts/IOAPIC.h>
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#include <Kernel/Interrupts/InterruptManagement.h>
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#include <Kernel/Interrupts/PIC.h>
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#include <Kernel/Interrupts/SpuriousInterruptHandler.h>
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#include <Kernel/Interrupts/UnhandledInterruptHandler.h>
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#include <Kernel/API/Syscall.h>
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#include <Kernel/VM/MemoryManager.h>
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#include <Kernel/VM/TypedMapping.h>
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#define PCAT_COMPAT_FLAG 0x1
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namespace Kernel {
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static InterruptManagement* s_interrupt_management;
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bool InterruptManagement::initialized()
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{
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return (s_interrupt_management != nullptr);
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}
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InterruptManagement& InterruptManagement::the()
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{
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ASSERT(InterruptManagement::initialized());
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return *s_interrupt_management;
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}
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void InterruptManagement::initialize()
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{
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ASSERT(!InterruptManagement::initialized());
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s_interrupt_management = new InterruptManagement();
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if (kernel_command_line().lookup("smp").value_or("off") == "on")
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InterruptManagement::the().switch_to_ioapic_mode();
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else
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InterruptManagement::the().switch_to_pic_mode();
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}
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void InterruptManagement::enumerate_interrupt_handlers(Function<void(GenericInterruptHandler&)> callback)
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{
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for (int i = 0; i < GENERIC_INTERRUPT_HANDLERS_COUNT; i++) {
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auto& handler = get_interrupt_handler(i);
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if (handler.type() != HandlerType::UnhandledInterruptHandler)
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callback(handler);
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}
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}
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IRQController& InterruptManagement::get_interrupt_controller(int index)
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{
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ASSERT(index >= 0);
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ASSERT(!m_interrupt_controllers[index].is_null());
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return *m_interrupt_controllers[index];
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}
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u8 InterruptManagement::acquire_mapped_interrupt_number(u8 original_irq)
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{
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if (!InterruptManagement::initialized()) {
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// This is necessary, because we install UnhandledInterruptHandlers before we actually initialize the Interrupt Management object...
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return original_irq;
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}
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return InterruptManagement::the().get_mapped_interrupt_vector(original_irq);
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}
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u8 InterruptManagement::acquire_irq_number(u8 mapped_interrupt_vector)
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{
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ASSERT(InterruptManagement::initialized());
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return InterruptManagement::the().get_irq_vector(mapped_interrupt_vector);
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}
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u8 InterruptManagement::get_mapped_interrupt_vector(u8 original_irq)
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{
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// FIXME: For SMP configuration (with IOAPICs) use a better routing scheme to make redirections more efficient.
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// FIXME: Find a better way to handle conflict with Syscall interrupt gate.
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ASSERT((original_irq + IRQ_VECTOR_BASE) != syscall_vector);
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return original_irq;
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}
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u8 InterruptManagement::get_irq_vector(u8 mapped_interrupt_vector)
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{
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// FIXME: For SMP configuration (with IOAPICs) use a better routing scheme to make redirections more efficient.
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return mapped_interrupt_vector;
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}
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RefPtr<IRQController> InterruptManagement::get_responsible_irq_controller(u8 interrupt_vector)
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{
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if (m_interrupt_controllers.size() == 1 && m_interrupt_controllers[0]->type() == IRQControllerType::i8259) {
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return m_interrupt_controllers[0];
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}
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for (auto irq_controller : m_interrupt_controllers) {
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if (irq_controller->gsi_base() <= interrupt_vector)
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if (!irq_controller->is_hard_disabled())
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return irq_controller;
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}
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ASSERT_NOT_REACHED();
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}
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PhysicalAddress InterruptManagement::search_for_madt()
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{
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dbg() << "Early access to ACPI tables for interrupt setup";
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auto rsdp = ACPI::StaticParsing::find_rsdp();
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if (!rsdp.has_value())
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return {};
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return ACPI::StaticParsing::find_table(rsdp.value(), "APIC");
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}
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InterruptManagement::InterruptManagement()
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: m_madt(search_for_madt())
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{
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}
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void InterruptManagement::switch_to_pic_mode()
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{
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klog() << "Interrupts: Switch to Legacy PIC mode";
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InterruptDisabler disabler;
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m_smp_enabled = false;
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m_interrupt_controllers[0] = adopt(*new PIC());
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SpuriousInterruptHandler::initialize(7);
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SpuriousInterruptHandler::initialize(15);
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for (auto& irq_controller : m_interrupt_controllers) {
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ASSERT(irq_controller);
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if (irq_controller->type() == IRQControllerType::i82093AA) {
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irq_controller->hard_disable();
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dbg() << "Interrupts: Detected " << irq_controller->model() << " - Disabled";
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} else {
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dbg() << "Interrupts: Detected " << irq_controller->model();
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}
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}
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}
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void InterruptManagement::switch_to_ioapic_mode()
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{
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klog() << "Interrupts: Switch to IOAPIC mode";
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InterruptDisabler disabler;
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if (m_madt.is_null()) {
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dbg() << "Interrupts: ACPI MADT is not available, reverting to PIC mode";
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switch_to_pic_mode();
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return;
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}
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dbg() << "Interrupts: MADT @ P " << m_madt.as_ptr();
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locate_apic_data();
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m_smp_enabled = true;
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if (m_interrupt_controllers.size() == 1) {
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if (get_interrupt_controller(0).type() == IRQControllerType::i8259) {
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klog() << "Interrupts: NO IOAPIC detected, Reverting to PIC mode.";
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return;
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}
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}
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for (auto& irq_controller : m_interrupt_controllers) {
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ASSERT(irq_controller);
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if (irq_controller->type() == IRQControllerType::i8259) {
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irq_controller->hard_disable();
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dbg() << "Interrupts: Detected " << irq_controller->model() << " Disabled";
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} else {
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dbg() << "Interrupts: Detected " << irq_controller->model();
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}
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}
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if (auto mp_parser = MultiProcessorParser::autodetect()) {
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m_pci_interrupt_overrides = mp_parser->get_pci_interrupt_redirections();
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}
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APIC::the().init_bsp();
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}
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void InterruptManagement::locate_apic_data()
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{
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ASSERT(!m_madt.is_null());
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auto madt = map_typed<ACPI::Structures::MADT>(m_madt);
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int irq_controller_count = 0;
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if (madt->flags & PCAT_COMPAT_FLAG) {
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m_interrupt_controllers[0] = adopt(*new PIC());
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irq_controller_count++;
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}
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size_t entry_index = 0;
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size_t entries_length = madt->h.length - sizeof(ACPI::Structures::MADT);
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auto* madt_entry = madt->entries;
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while (entries_length > 0) {
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size_t entry_length = madt_entry->length;
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if (madt_entry->type == (u8)ACPI::Structures::MADTEntryType::IOAPIC) {
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auto* ioapic_entry = (const ACPI::Structures::MADTEntries::IOAPIC*)madt_entry;
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dbg() << "IOAPIC found @ MADT entry " << entry_index << ", MMIO Registers @ " << PhysicalAddress(ioapic_entry->ioapic_address);
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m_interrupt_controllers.resize(1 + irq_controller_count);
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m_interrupt_controllers[irq_controller_count] = adopt(*new IOAPIC(PhysicalAddress(ioapic_entry->ioapic_address), ioapic_entry->gsi_base));
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irq_controller_count++;
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}
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if (madt_entry->type == (u8)ACPI::Structures::MADTEntryType::InterruptSourceOverride) {
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auto* interrupt_override_entry = (const ACPI::Structures::MADTEntries::InterruptSourceOverride*)madt_entry;
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m_isa_interrupt_overrides.empend(
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interrupt_override_entry->bus,
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interrupt_override_entry->source,
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interrupt_override_entry->global_system_interrupt,
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interrupt_override_entry->flags);
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dbg() << "Interrupts: Overriding INT 0x" << String::format("%x", interrupt_override_entry->source) << " with GSI " << interrupt_override_entry->global_system_interrupt << ", for bus 0x" << String::format("%x", interrupt_override_entry->bus);
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}
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madt_entry = (ACPI::Structures::MADTEntryHeader*)(VirtualAddress(madt_entry).offset(entry_length).get());
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entries_length -= entry_length;
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entry_index++;
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}
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}
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}
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