mirror of
https://github.com/ecency/ecency-mobile.git
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272 lines
8.6 KiB
C++
272 lines
8.6 KiB
C++
/*
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* Copyright 2016 Facebook, Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/*
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* N.B. You most likely do _not_ want to use PicoSpinLock or any other
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* kind of spinlock. Consider MicroLock instead.
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*
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* In short, spinlocks in preemptive multi-tasking operating systems
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* have serious problems and fast mutexes like std::mutex are almost
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* certainly the better choice, because letting the OS scheduler put a
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* thread to sleep is better for system responsiveness and throughput
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* than wasting a timeslice repeatedly querying a lock held by a
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* thread that's blocked, and you can't prevent userspace
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* programs blocking.
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*
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* Spinlocks in an operating system kernel make much more sense than
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* they do in userspace.
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*/
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#pragma once
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#define FOLLY_PICO_SPIN_LOCK_H_
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/*
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* @author Keith Adams <kma@fb.com>
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* @author Jordan DeLong <delong.j@fb.com>
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*/
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#include <array>
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#include <atomic>
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#include <cinttypes>
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#include <cstdlib>
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#include <folly/Portability.h>
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#include <mutex>
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#include <pthread.h>
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#include <type_traits>
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#include <glog/logging.h>
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#include <folly/detail/Sleeper.h>
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#if !FOLLY_X64 && !FOLLY_A64 && !FOLLY_PPC64
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# error "PicoSpinLock.h is currently x64, aarch64 and ppc64 only."
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#endif
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namespace folly {
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/*
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* Spin lock on a single bit in an integral type. You can use this
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* with 16, 32, or 64-bit integral types.
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*
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* This is useful if you want a small lock and already have an int
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* with a bit in it that you aren't using. But note that it can't be
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* as small as MicroSpinLock (1 byte), if you don't already have a
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* convenient int with an unused bit lying around to put it on.
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*
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* To construct these, either use init() or zero initialize. We don't
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* have a real constructor because we want this to be a POD type so we
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* can put it into packed structs.
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*/
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template<class IntType, int Bit = sizeof(IntType) * 8 - 1>
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struct PicoSpinLock {
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// Internally we deal with the unsigned version of the type.
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typedef typename std::make_unsigned<IntType>::type UIntType;
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static_assert(std::is_integral<IntType>::value,
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"PicoSpinLock needs an integral type");
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static_assert(sizeof(IntType) == 2 || sizeof(IntType) == 4 ||
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sizeof(IntType) == 8,
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"PicoSpinLock can't work on integers smaller than 2 bytes");
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public:
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static const UIntType kLockBitMask_ = UIntType(1) << Bit;
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UIntType lock_;
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/*
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* You must call this function before using this class, if you
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* default constructed it. If you zero-initialized it you can
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* assume the PicoSpinLock is in a valid unlocked state with
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* getData() == 0.
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*
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* (This doesn't use a constructor because we want to be a POD.)
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*/
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void init(IntType initialValue = 0) {
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CHECK(!(initialValue & kLockBitMask_));
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lock_ = initialValue;
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}
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/*
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* Returns the value of the integer we using for our lock, except
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* with the bit we are using as a lock cleared, regardless of
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* whether the lock is held.
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*
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* It is 'safe' to call this without holding the lock. (As in: you
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* get the same guarantees for simultaneous accesses to an integer
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* as you normally get.)
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*/
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IntType getData() const {
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return static_cast<IntType>(lock_ & ~kLockBitMask_);
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}
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/*
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* Set the value of the other bits in our integer.
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*
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* Don't use this when you aren't holding the lock, unless it can be
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* guaranteed that no other threads may be trying to use this.
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*/
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void setData(IntType w) {
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CHECK(!(w & kLockBitMask_));
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lock_ = (lock_ & kLockBitMask_) | w;
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}
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/*
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* Try to get the lock without blocking: returns whether or not we
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* got it.
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*/
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bool try_lock() const {
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bool ret = false;
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#ifdef _MSC_VER
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switch (sizeof(IntType)) {
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case 2:
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// There is no _interlockedbittestandset16 for some reason :(
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ret = _InterlockedOr16(
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(volatile short*)&lock_, (short)kLockBitMask_) & kLockBitMask_;
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break;
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case 4:
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ret = _interlockedbittestandset((volatile long*)&lock_, Bit);
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break;
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case 8:
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ret = _interlockedbittestandset64((volatile long long*)&lock_, Bit);
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break;
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}
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#elif FOLLY_X64
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#define FB_DOBTS(size) \
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asm volatile("lock; bts" #size " %1, (%2); setnc %0" \
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: "=r" (ret) \
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: "i" (Bit), \
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"r" (&lock_) \
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: "memory", "flags")
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switch (sizeof(IntType)) {
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case 2: FB_DOBTS(w); break;
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case 4: FB_DOBTS(l); break;
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case 8: FB_DOBTS(q); break;
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}
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#undef FB_DOBTS
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#elif FOLLY_A64
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ret = __atomic_fetch_or(&lock_, 1 << Bit, __ATOMIC_SEQ_CST);
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#elif FOLLY_PPC64
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#define FB_DOBTS(size) \
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asm volatile("\teieio\n" \
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"\tl" #size "arx 14,0,%[lockPtr]\n" \
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"\tli 15,1\n" \
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"\tsldi 15,15,%[bit]\n" \
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"\tand. 16,15,14\n" \
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"\tbne 0f\n" \
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"\tor 14,14,15\n" \
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"\tst" #size "cx. 14,0,%[lockPtr]\n" \
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"\tbne 0f\n" \
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"\tori %[output],%[output],1\n" \
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"\tisync\n" \
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"0:\n" \
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: [output] "+r" (ret) \
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: [lockPtr] "r"(&lock_), \
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[bit] "i" (Bit) \
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: "cr0", "memory", "r14", "r15", "r16")
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switch (sizeof(IntType)) {
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case 2: FB_DOBTS(h); break;
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case 4: FB_DOBTS(w); break;
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case 8: FB_DOBTS(d); break;
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}
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#undef FB_DOBTS
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#else
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#error "x86 aarch64 ppc64 only"
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#endif
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return ret;
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}
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/*
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* Block until we can acquire the lock. Uses Sleeper to wait.
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*/
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void lock() const {
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detail::Sleeper sleeper;
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while (!try_lock()) {
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sleeper.wait();
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}
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}
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/*
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* Release the lock, without changing the value of the rest of the
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* integer.
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*/
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void unlock() const {
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#ifdef _MSC_VER
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switch (sizeof(IntType)) {
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case 2:
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// There is no _interlockedbittestandreset16 for some reason :(
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_InterlockedAnd16((volatile short*)&lock_, (short)~kLockBitMask_);
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break;
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case 4:
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_interlockedbittestandreset((volatile long*)&lock_, Bit);
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break;
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case 8:
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_interlockedbittestandreset64((volatile long long*)&lock_, Bit);
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break;
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}
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#elif FOLLY_X64
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#define FB_DOBTR(size) \
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asm volatile("lock; btr" #size " %0, (%1)" \
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: \
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: "i" (Bit), \
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"r" (&lock_) \
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: "memory", "flags")
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// Reads and writes can not be reordered wrt locked instructions,
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// so we don't need a memory fence here.
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switch (sizeof(IntType)) {
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case 2: FB_DOBTR(w); break;
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case 4: FB_DOBTR(l); break;
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case 8: FB_DOBTR(q); break;
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}
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#undef FB_DOBTR
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#elif FOLLY_A64
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__atomic_fetch_and(&lock_, ~(1 << Bit), __ATOMIC_SEQ_CST);
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#elif FOLLY_PPC64
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#define FB_DOBTR(size) \
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asm volatile("\teieio\n" \
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"0: l" #size "arx 14,0,%[lockPtr]\n" \
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"\tli 15,1\n" \
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"\tsldi 15,15,%[bit]\n" \
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"\txor 14,14,15\n" \
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"\tst" #size "cx. 14,0,%[lockPtr]\n" \
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"\tbne 0b\n" \
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"\tisync\n" \
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: \
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: [lockPtr] "r"(&lock_), \
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[bit] "i" (Bit) \
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: "cr0", "memory", "r14", "r15")
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switch (sizeof(IntType)) {
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case 2: FB_DOBTR(h); break;
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case 4: FB_DOBTR(w); break;
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case 8: FB_DOBTR(d); break;
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}
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#undef FB_DOBTR
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#else
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# error "x64 aarch64 ppc64 only"
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#endif
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}
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};
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}
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