2017-07-29 03:05:35 +03:00
|
|
|
{ lib }:
|
|
|
|
with import ./parse.nix { inherit lib; };
|
|
|
|
with lib.attrsets;
|
|
|
|
with lib.lists;
|
2017-05-21 20:39:23 +03:00
|
|
|
|
|
|
|
rec {
|
2017-06-12 20:27:10 +03:00
|
|
|
patterns = rec {
|
2018-03-20 05:14:45 +03:00
|
|
|
isi686 = { cpu = cpuTypes.i686; };
|
|
|
|
isx86_64 = { cpu = cpuTypes.x86_64; };
|
|
|
|
isPowerPC = { cpu = cpuTypes.powerpc; };
|
|
|
|
isx86 = { cpu = { family = "x86"; }; };
|
treewide: isArm -> isAarch32
Following legacy packing conventions, `isArm` was defined just for
32-bit ARM instruction set. This is confusing to non packagers though,
because Aarch64 is an ARM instruction set.
The official ARM overview for ARMv8[1] is surprisingly not confusing,
given the overall state of affairs for ARM naming conventions, and
offers us a solution. It divides the nomenclature into three levels:
```
ISA: ARMv8 {-A, -R, -M}
/ \
Mode: Aarch32 Aarch64
| / \
Encoding: A64 A32 T32
```
At the top is the overall v8 instruction set archicture. Second are the
two modes, defined by bitwidth but differing in other semantics too, and
buttom are the encodings, (hopefully?) isomorphic if they encode the
same mode.
The 32 bit encodings are mostly backwards compatible with previous
non-Thumb and Thumb encodings, and if so we can pun the mode names to
instead mean "sets of compatable or isomorphic encodings", and then
voilà we have nice names for 32-bit and 64-bit arm instruction sets
which do not use the word ARM so as to not confused either laymen or
experienced ARM packages.
[1]: https://developer.arm.com/products/architecture/a-profile
(cherry picked from commit ba52ae50488de85a9cf60a3a04f1c9ca7122ec74)
2018-03-20 05:41:06 +03:00
|
|
|
isAarch32 = { cpu = { family = "arm"; bits = 32; }; };
|
|
|
|
isAarch64 = { cpu = { family = "arm"; bits = 64; }; };
|
2018-03-20 05:14:45 +03:00
|
|
|
isMips = { cpu = { family = "mips"; }; };
|
|
|
|
isRiscV = { cpu = { family = "riscv"; }; };
|
|
|
|
isWasm = { cpu = { family = "wasm"; }; };
|
|
|
|
|
|
|
|
is32bit = { cpu = { bits = 32; }; };
|
|
|
|
is64bit = { cpu = { bits = 64; }; };
|
|
|
|
isBigEndian = { cpu = { significantByte = significantBytes.bigEndian; }; };
|
|
|
|
isLittleEndian = { cpu = { significantByte = significantBytes.littleEndian; }; };
|
|
|
|
|
|
|
|
isBSD = { kernel = { families = { inherit (kernelFamilies) bsd; }; }; };
|
2018-03-20 05:14:45 +03:00
|
|
|
isDarwin = { kernel = { families = { inherit (kernelFamilies) darwin; }; }; };
|
2018-03-20 05:14:45 +03:00
|
|
|
isUnix = [ isBSD isDarwin isLinux isSunOS isHurd isCygwin ];
|
|
|
|
|
2018-03-20 05:14:45 +03:00
|
|
|
isMacOS = { kernel = kernels.macos; };
|
|
|
|
isiOS = { kernel = kernels.ios; };
|
2018-03-20 05:14:45 +03:00
|
|
|
isLinux = { kernel = kernels.linux; };
|
|
|
|
isSunOS = { kernel = kernels.solaris; };
|
|
|
|
isFreeBSD = { kernel = kernels.freebsd; };
|
|
|
|
isHurd = { kernel = kernels.hurd; };
|
|
|
|
isNetBSD = { kernel = kernels.netbsd; };
|
|
|
|
isOpenBSD = { kernel = kernels.openbsd; };
|
|
|
|
isWindows = { kernel = kernels.windows; };
|
|
|
|
isCygwin = { kernel = kernels.windows; abi = abis.cygnus; };
|
|
|
|
isMinGW = { kernel = kernels.windows; abi = abis.gnu; };
|
|
|
|
|
|
|
|
isAndroid = [ { abi = abis.android; } { abi = abis.androideabi; } ];
|
|
|
|
isMusl = with abis; map (a: { abi = a; }) [ musl musleabi musleabihf ];
|
2018-05-10 06:33:31 +03:00
|
|
|
isUClibc = with abis; map (a: { abi = a; }) [ uclibc uclibceabi uclibceabihf ];
|
2018-03-20 05:14:45 +03:00
|
|
|
|
|
|
|
isEfi = map (family: { cpu.family = family; })
|
|
|
|
[ "x86" "arm" "aarch64" ];
|
treewide: isArm -> isAarch32
Following legacy packing conventions, `isArm` was defined just for
32-bit ARM instruction set. This is confusing to non packagers though,
because Aarch64 is an ARM instruction set.
The official ARM overview for ARMv8[1] is surprisingly not confusing,
given the overall state of affairs for ARM naming conventions, and
offers us a solution. It divides the nomenclature into three levels:
```
ISA: ARMv8 {-A, -R, -M}
/ \
Mode: Aarch32 Aarch64
| / \
Encoding: A64 A32 T32
```
At the top is the overall v8 instruction set archicture. Second are the
two modes, defined by bitwidth but differing in other semantics too, and
buttom are the encodings, (hopefully?) isomorphic if they encode the
same mode.
The 32 bit encodings are mostly backwards compatible with previous
non-Thumb and Thumb encodings, and if so we can pun the mode names to
instead mean "sets of compatable or isomorphic encodings", and then
voilà we have nice names for 32-bit and 64-bit arm instruction sets
which do not use the word ARM so as to not confused either laymen or
experienced ARM packages.
[1]: https://developer.arm.com/products/architecture/a-profile
(cherry picked from commit ba52ae50488de85a9cf60a3a04f1c9ca7122ec74)
2018-03-20 05:41:06 +03:00
|
|
|
|
|
|
|
# Deprecated after 18.03
|
|
|
|
isArm = isAarch32;
|
2017-05-21 20:39:23 +03:00
|
|
|
};
|
|
|
|
|
2017-06-12 20:27:10 +03:00
|
|
|
matchAnyAttrs = patterns:
|
|
|
|
if builtins.isList patterns then attrs: any (pattern: matchAttrs pattern attrs) patterns
|
|
|
|
else matchAttrs patterns;
|
|
|
|
|
2018-03-20 05:14:45 +03:00
|
|
|
predicates = mapAttrs (_: matchAnyAttrs) patterns;
|
2017-05-21 20:39:23 +03:00
|
|
|
}
|