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vhd2vl: init at unstable-2018-09-01

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This commit is contained in:
Matt Huszagh 2020-05-04 10:40:35 -07:00
parent d3dc37ac77
commit 38aadfbbad
2 changed files with 41 additions and 0 deletions
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39
pkgs/applications/science/electronics/vhd2vl/default.nix Normal file
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@ -0,0 +1,39 @@
{ stdenv
, fetchFromGitHub
, bison
, flex
, verilog
}:
stdenv.mkDerivation rec {
pname = "vhd2vl";
version = "unstable-2018-09-01";
src = fetchFromGitHub {
owner = "ldoolitt";
repo = pname;
rev = "37e3143395ce4e7d2f2e301e12a538caf52b983c";
sha256 = "17va2pil4938j8c93anhy45zzgnvq3k71a7glj02synfrsv6fs8n";
};
nativeBuildInputs = [
bison
flex
];
buildInputs = [
verilog
];
installPhase = ''
mkdir -p $out/bin
cp src/vhd2vl $out/bin/
'';
meta = with stdenv.lib; {
description = "VHDL to Verilog converter";
homepage = "https://github.com/ldoolitt/vhd2vl";
license = licenses.gpl2Plus;
maintainers = with maintainers; [ matthuszagh ];
};
}

2
pkgs/top-level/all-packages.nix
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@ -7242,6 +7242,8 @@ in
verilog = callPackage ../applications/science/electronics/verilog {};
vhd2vl = callPackage ../applications/science/electronics/vhd2vl { };
video2midi = callPackage ../tools/audio/video2midi {
pythonPackages = python3Packages;
};