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mirror of https://github.com/kanaka/mal.git synced 2024-11-10 12:47:45 +03:00
mal/vhdl
Joel Martin 20e8dea043 Refactor to use run scripts, remove *_RUNSTEP
- Add */run script for every implementation.

- Refactor Clojure build to allow individual jar files for each step.

- Update FFI version for es6 and miniMAL to work with newer node
  versions.

The run scripts for the following could use some additional
refactoring:
- java: build individual step jar, use java -jar instead of mvn to run
- plpgsql: maybe combine plpgsql/run and plpgsql/wrap.sh
- vhdl: combine vhdl/run and vhdl/run_vhdl.sh
- vimscript: combine vimscript/run and vimscript/run_vimscript.sh
2016-05-18 22:29:18 -07:00
..
.gitignore Add VHDL implementation 2016-05-05 14:50:12 -04:00
core.vhdl Add VHDL implementation 2016-05-05 14:50:12 -04:00
Dockerfile vhdl: Update Dockerfile, add Travis-CI build 2016-05-05 16:06:28 -04:00
env.vhdl Add VHDL implementation 2016-05-05 14:50:12 -04:00
Makefile Add VHDL implementation 2016-05-05 14:50:12 -04:00
pkg_readline.vhdl Add VHDL implementation 2016-05-05 14:50:12 -04:00
printer.vhdl Add VHDL implementation 2016-05-05 14:50:12 -04:00
reader.vhdl Add VHDL implementation 2016-05-05 14:50:12 -04:00
run Refactor to use run scripts, remove *_RUNSTEP 2016-05-18 22:29:18 -07:00
run_vhdl.sh Add VHDL implementation 2016-05-05 14:50:12 -04:00
step0_repl.vhdl Add VHDL implementation 2016-05-05 14:50:12 -04:00
step1_read_print.vhdl Add VHDL implementation 2016-05-05 14:50:12 -04:00
step2_eval.vhdl Add VHDL implementation 2016-05-05 14:50:12 -04:00
step3_env.vhdl Add VHDL implementation 2016-05-05 14:50:12 -04:00
step4_if_fn_do.vhdl Add VHDL implementation 2016-05-05 14:50:12 -04:00
step5_tco.vhdl Add VHDL implementation 2016-05-05 14:50:12 -04:00
step6_file.vhdl Add VHDL implementation 2016-05-05 14:50:12 -04:00
step7_quote.vhdl Add VHDL implementation 2016-05-05 14:50:12 -04:00
step8_macros.vhdl Add VHDL implementation 2016-05-05 14:50:12 -04:00
step9_try.vhdl Add VHDL implementation 2016-05-05 14:50:12 -04:00
stepA_mal.vhdl Add VHDL implementation 2016-05-05 14:50:12 -04:00
types.vhdl Add VHDL implementation 2016-05-05 14:50:12 -04:00