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mirror of https://github.com/kanaka/mal.git synced 2024-11-11 08:56:41 +03:00
mal/vhdl/step1_read_print.vhdl
2016-05-05 14:50:12 -04:00

71 lines
1.7 KiB
VHDL

entity step1_read_print is
end entity step1_read_print;
library STD;
use STD.textio.all;
library WORK;
use WORK.pkg_readline.all;
use WORK.types.all;
use WORK.printer.all;
use WORK.reader.all;
architecture test of step1_read_print is
procedure mal_READ(str: in string; ast: out mal_val_ptr; err: out mal_val_ptr) is
begin
read_str(str, ast, err);
end procedure mal_READ;
procedure EVAL(ast: inout mal_val_ptr; env: in string; result: out mal_val_ptr) is
begin
result := ast;
end procedure EVAL;
procedure mal_PRINT(exp: inout mal_val_ptr; result: out line) is
begin
pr_str(exp, true, result);
end procedure mal_PRINT;
procedure REP(str: in string; result: out line; err: out mal_val_ptr) is
variable ast, eval_res, read_err: mal_val_ptr;
begin
mal_READ(str, ast, read_err);
if read_err /= null then
err := read_err;
result := null;
return;
end if;
if ast = null then
result := null;
return;
end if;
EVAL(ast, "", eval_res);
mal_PRINT(eval_res, result);
end procedure REP;
procedure repl is
variable is_eof: boolean;
variable input_line, result: line;
variable err: mal_val_ptr;
begin
loop
mal_readline("user> ", is_eof, input_line);
exit when is_eof;
next when input_line'length = 0;
REP(input_line.all, result, err);
if err /= null then
pr_str(err, false, result);
result := new string'("Error: " & result.all);
end if;
if result /= null then
mal_printline(result.all);
end if;
deallocate(result);
deallocate(err);
end loop;
mal_printline("");
end procedure repl;
begin
repl;
end architecture test;