2022-09-16 08:55:04 +03:00
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#include "mold.h"
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namespace mold::elf {
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using E = SPARC64;
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template <>
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2022-09-16 09:21:37 +03:00
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void PltSection<E>::copy_buf(Context<E> &ctx) {
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u8 *buf = ctx.buf + this->shdr.sh_offset;
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memset(buf, 0, this->shdr.sh_size);
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for (i64 i = 0; i < symbols.size(); i++) {
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Symbol<E> &sym = *symbols[i];
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ub32 *ent = (ub32 *)(buf + E::plt_hdr_size + i * E::plt_size);
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u64 addr = sym.get_plt_addr(ctx);
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// sethi (. - .PLT0), %g1
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ent[0] = 0x3000'0000 | ((ctx.plt->shdr.sh_addr - addr) >> 10);
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// ba,a %xcc, .PLT1
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ent[1] = 0x3040'0000 | ((addr - ctx.plt->shdr.sh_addr + E::plt_size) >> 10);
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}
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}
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2022-09-16 08:55:04 +03:00
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template <>
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void PltGotSection<E>::copy_buf(Context<E> &ctx) {}
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template <>
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void EhFrameSection<E>::apply_reloc(Context<E> &ctx, const ElfRel<E> &rel,
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2022-09-16 09:21:37 +03:00
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u64 offset, u64 val) {
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u8 *loc = ctx.buf + this->shdr.sh_offset + offset;
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switch (rel.r_type) {
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case R_NONE:
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return;
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default:
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Fatal(ctx) << "unknown relocation in ehframe: " << rel;
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return;
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}
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unreachable();
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}
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2022-09-16 08:55:04 +03:00
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template <>
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2022-09-16 09:21:37 +03:00
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void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
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ElfRel<E> *dynrel = nullptr;
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std::span<const ElfRel<E>> rels = get_rels(ctx);
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i64 frag_idx = 0;
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if (ctx.reldyn)
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dynrel = (ElfRel<E> *)(ctx.buf + ctx.reldyn->shdr.sh_offset +
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file.reldyn_offset + this->reldyn_offset);
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for (i64 i = 0; i < rels.size(); i++) {
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const ElfRel<E> &rel = rels[i];
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if (rel.r_type == R_NONE)
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continue;
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Symbol<E> &sym = *file.symbols[rel.r_sym];
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u8 *loc = base + rel.r_offset;
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const SectionFragmentRef<E> *frag_ref = nullptr;
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if (rel_fragments && rel_fragments[frag_idx].idx == i)
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frag_ref = &rel_fragments[frag_idx++];
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auto check = [&](i64 val, i64 lo, i64 hi) {
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if (val < lo || hi <= val)
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Error(ctx) << *this << ": relocation " << rel << " against "
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<< sym << " out of range: " << val << " is not in ["
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<< lo << ", " << hi << ")";
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};
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#define S (frag_ref ? frag_ref->frag->get_addr(ctx) : sym.get_addr(ctx))
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#define A (frag_ref ? frag_ref->addend : this->get_addend(rel))
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#define P (output_section->shdr.sh_addr + offset + rel.r_offset)
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#define G (sym.get_got_addr(ctx) - ctx.got->shdr.sh_addr)
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#define GOT ctx.got->shdr.sh_addr
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switch (rel.r_type) {
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case R_SPARC_64:
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case R_SPARC_UA64:
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apply_abs_dyn_rel(ctx, sym, rel, loc, S, A, P, dynrel);
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break;
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case R_SPARC_5:
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case R_SPARC_7:
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case R_SPARC_6:
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case R_SPARC_8:
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case R_SPARC_10:
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case R_SPARC_11:
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case R_SPARC_16:
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case R_SPARC_32:
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case R_SPARC_UA16:
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case R_SPARC_UA32:
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case R_SPARC_22:
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case R_SPARC_13:
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case R_SPARC_HI22:
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case R_SPARC_HH22:
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case R_SPARC_HM10:
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case R_SPARC_LM22:
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case R_SPARC_LO10:
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case R_SPARC_OLO10:
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case R_SPARC_HIX22:
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case R_SPARC_LOX10:
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case R_SPARC_H44:
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case R_SPARC_M44:
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case R_SPARC_L44:
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case R_SPARC_REGISTER:
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case R_SPARC_GOT10:
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case R_SPARC_GOT13:
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case R_SPARC_GOT22:
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case R_SPARC_PLT32:
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case R_SPARC_WPLT30:
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case R_SPARC_HIPLT22:
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case R_SPARC_LOPLT10:
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case R_SPARC_PCPLT32:
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case R_SPARC_PCPLT22:
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case R_SPARC_PCPLT10:
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case R_SPARC_PLT64:
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case R_SPARC_TLS_GD_HI22:
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case R_SPARC_TLS_LDM_HI22:
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case R_SPARC_TLS_IE_HI22:
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case R_SPARC_TLS_IE_LD:
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case R_SPARC_TLS_IE_LDX:
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case R_SPARC_TLS_IE_ADD:
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case R_SPARC_TLS_LE_HIX22:
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case R_SPARC_DISP8:
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case R_SPARC_DISP16:
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case R_SPARC_DISP32:
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case R_SPARC_PC10:
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case R_SPARC_PC22:
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case R_SPARC_WDISP30:
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case R_SPARC_WDISP22:
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case R_SPARC_PC_HH22:
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case R_SPARC_PC_HM10:
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case R_SPARC_PC_LM22:
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case R_SPARC_WDISP16:
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case R_SPARC_WDISP19:
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case R_SPARC_DISP64:
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case R_SPARC_TLS_GD_LO10:
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case R_SPARC_TLS_GD_ADD:
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case R_SPARC_TLS_GD_CALL:
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case R_SPARC_TLS_LDM_LO10:
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case R_SPARC_TLS_LDM_ADD:
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case R_SPARC_TLS_LDM_CALL:
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case R_SPARC_TLS_IE_LO10:
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case R_SPARC_TLS_LE_LOX10:
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case R_SPARC_TLS_LDO_HIX22:
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case R_SPARC_TLS_LDO_ADD:
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case R_SPARC_TLS_LDO_LOX10:
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case R_SPARC_GOTDATA_OP_HIX22:
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case R_SPARC_GOTDATA_OP_LOX10:
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case R_SPARC_GOTDATA_OP:
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break;
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default:
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Fatal(ctx) << *this << ": apply_reloc_alloc relocation: " << rel;
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}
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#undef S
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#undef A
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#undef P
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#undef G
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#undef GOT
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}
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}
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2022-09-16 08:55:04 +03:00
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template <>
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2022-09-16 09:21:37 +03:00
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void InputSection<E>::apply_reloc_nonalloc(Context<E> &ctx, u8 *base) {
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std::span<const ElfRel<E>> rels = get_rels(ctx);
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for (i64 i = 0; i < rels.size(); i++) {
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const ElfRel<E> &rel = rels[i];
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if (rel.r_type == R_NONE)
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continue;
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Symbol<E> &sym = *file.symbols[rel.r_sym];
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u8 *loc = base + rel.r_offset;
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if (!sym.file) {
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record_undef_error(ctx, rel);
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continue;
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}
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SectionFragment<E> *frag;
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i64 addend;
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std::tie(frag, addend) = get_fragment(ctx, rel);
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auto check = [&](i64 val, i64 lo, i64 hi) {
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if (val < lo || hi <= val)
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Error(ctx) << *this << ": relocation " << rel << " against "
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<< sym << " out of range: " << val << " is not in ["
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<< lo << ", " << hi << ")";
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};
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#define S (frag ? frag->get_addr(ctx) : sym.get_addr(ctx))
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#define A (frag ? addend : this->get_addend(rel))
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switch (rel.r_type) {
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case R_NONE:
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break;
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case R_SPARC_64:
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if (!frag) {
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if (std::optional<u64> val = get_tombstone(sym)) {
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*(ul64 *)loc = *val;
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break;
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}
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}
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*(ul64 *)loc = S + A;
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break;
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default:
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Fatal(ctx) << *this << ": apply_reloc_nonalloc: " << rel;
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}
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#undef S
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#undef A
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}
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}
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2022-09-16 08:55:04 +03:00
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template <>
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2022-09-16 09:21:37 +03:00
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void InputSection<E>::scan_relocations(Context<E> &ctx) {
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assert(shdr().sh_flags & SHF_ALLOC);
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this->reldyn_offset = file.num_dynrel * sizeof(ElfRel<E>);
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std::span<const ElfRel<E>> rels = get_rels(ctx);
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// Scan relocations
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for (i64 i = 0; i < rels.size(); i++) {
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const ElfRel<E> &rel = rels[i];
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if (rel.r_type == R_NONE)
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continue;
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Symbol<E> &sym = *file.symbols[rel.r_sym];
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if (!sym.file) {
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record_undef_error(ctx, rel);
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continue;
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}
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if (sym.get_type() == STT_GNU_IFUNC)
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sym.flags |= (NEEDS_GOT | NEEDS_PLT);
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switch (rel.r_type) {
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case R_SPARC_64:
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case R_SPARC_UA64:
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scan_abs_dyn_rel(ctx, sym, rel);
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break;
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case R_SPARC_5:
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case R_SPARC_7:
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case R_SPARC_6:
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case R_SPARC_8:
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case R_SPARC_10:
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case R_SPARC_11:
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case R_SPARC_16:
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case R_SPARC_32:
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case R_SPARC_UA16:
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case R_SPARC_UA32:
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case R_SPARC_22:
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case R_SPARC_13:
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case R_SPARC_HI22:
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case R_SPARC_HH22:
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case R_SPARC_HM10:
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case R_SPARC_LM22:
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case R_SPARC_LO10:
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case R_SPARC_OLO10:
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case R_SPARC_HIX22:
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case R_SPARC_LOX10:
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case R_SPARC_H44:
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case R_SPARC_M44:
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case R_SPARC_L44:
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case R_SPARC_REGISTER:
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scan_abs_rel(ctx, sym, rel);
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break;
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case R_SPARC_GOT10:
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case R_SPARC_GOT13:
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case R_SPARC_GOT22:
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sym.flags |= NEEDS_GOT;
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break;
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case R_SPARC_PLT32:
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case R_SPARC_WPLT30:
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case R_SPARC_HIPLT22:
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case R_SPARC_LOPLT10:
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case R_SPARC_PCPLT32:
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case R_SPARC_PCPLT22:
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case R_SPARC_PCPLT10:
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case R_SPARC_PLT64:
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if (sym.is_imported)
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sym.flags |= NEEDS_PLT;
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break;
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case R_SPARC_TLS_GD_HI22:
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sym.flags |= NEEDS_TLSGD;
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break;
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case R_SPARC_TLS_LDM_HI22:
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ctx.needs_tlsld = true;
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break;
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case R_SPARC_TLS_IE_HI22:
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case R_SPARC_TLS_IE_LD:
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case R_SPARC_TLS_IE_LDX:
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case R_SPARC_TLS_IE_ADD:
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case R_SPARC_TLS_LE_HIX22:
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sym.flags |= NEEDS_GOTTP;
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break;
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case R_SPARC_DISP8:
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case R_SPARC_DISP16:
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case R_SPARC_DISP32:
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case R_SPARC_PC10:
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case R_SPARC_PC22:
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case R_SPARC_WDISP30:
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case R_SPARC_WDISP22:
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case R_SPARC_PC_HH22:
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case R_SPARC_PC_HM10:
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case R_SPARC_PC_LM22:
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case R_SPARC_WDISP16:
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case R_SPARC_WDISP19:
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case R_SPARC_DISP64:
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case R_SPARC_TLS_GD_LO10:
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case R_SPARC_TLS_GD_ADD:
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case R_SPARC_TLS_GD_CALL:
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case R_SPARC_TLS_LDM_LO10:
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case R_SPARC_TLS_LDM_ADD:
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case R_SPARC_TLS_LDM_CALL:
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case R_SPARC_TLS_IE_LO10:
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case R_SPARC_TLS_LE_LOX10:
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case R_SPARC_TLS_LDO_HIX22:
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case R_SPARC_TLS_LDO_ADD:
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case R_SPARC_TLS_LDO_LOX10:
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case R_SPARC_GOTDATA_OP_HIX22:
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case R_SPARC_GOTDATA_OP_LOX10:
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case R_SPARC_GOTDATA_OP:
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break;
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default:
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Fatal(ctx) << *this << ": scan_relocations: " << rel;
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}
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}
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}
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2022-09-16 08:55:04 +03:00
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} // namespace mold::elf
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