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Align range extension thunk entry points to 16 byte boundaries
Quote from Arm Cortex-A75 Software Optimization Guide (PJDOC-466751330-205) p.59: Consider aligning subroutine entry points and branch targets to 16-byte boundaries, within the bounds of the code-density requirements of the program. This ensures that the subsequent fetch can maximize bandwidth following the taken branch by bringing in all useful instructions.
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@ -575,26 +575,26 @@ void InputSection<E>::scan_relocations(Context<E> &ctx) {
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template <>
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void RangeExtensionThunk<E>::copy_buf(Context<E> &ctx) {
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static const ul32 data[] = {
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static const ul32 insn[] = {
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0x9000'0010, // adrp x16, 0 # R_AARCH64_ADR_PREL_PG_HI21
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0x9100'0210, // add x16, x16 # R_AARCH64_ADD_ABS_LO12_NC
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0xd61f'0200, // br x16
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0xd503'201f, // nop
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};
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static_assert(E::thunk_size == sizeof(data));
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static_assert(E::thunk_size == sizeof(insn));
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u8 *buf = ctx.buf + output_section.shdr.sh_offset + offset;
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u64 P = output_section.shdr.sh_addr + offset;
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for (Symbol<E> *sym : symbols) {
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u64 S = sym->get_addr(ctx);
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memcpy(buf, data, sizeof(data));
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memcpy(buf, insn, E::thunk_size);
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write_adrp(buf, page(S) - page(P));
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*(ul32 *)(buf + 4) |= bits(S, 11, 0) << 10;
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buf += sizeof(data);
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P += sizeof(data);
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buf += E::thunk_size;
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P += E::thunk_size;
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}
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}
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@ -2000,7 +2000,7 @@ struct ARM64 {
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static constexpr u32 plt_size = 16;
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static constexpr u32 pltgot_size = 16;
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static constexpr u32 thunk_hdr_size = 0;
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static constexpr u32 thunk_size = 12;
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static constexpr u32 thunk_size = 16;
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static constexpr u32 R_COPY = R_AARCH64_COPY;
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static constexpr u32 R_GLOB_DAT = R_AARCH64_GLOB_DAT;
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