mirror of
https://github.com/rui314/mold.git
synced 2024-09-21 09:57:18 +03:00
488 lines
15 KiB
C++
488 lines
15 KiB
C++
#include "mold.h"
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namespace mold::elf {
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static void write_adr(u8 *buf, u64 val) {
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u32 hi = (val & 0x1ffffc) << 3;
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u32 lo = (val & 3) << 29;
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*(u32 *)buf = (*(u32 *)buf & 0x9f00001f) | hi | lo;
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}
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// Returns [hi:lo] bits of val.
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static u64 bits(u64 val, u64 hi, u64 lo) {
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return (val >> lo) & (((u64)1 << (hi - lo + 1)) - 1);
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}
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static u64 page(u64 val) {
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return val & ~(u64)0xfff;
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}
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template <>
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void GotPltSection<ARM64>::copy_buf(Context<ARM64> &ctx) {
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u64 *buf = (u64 *)(ctx.buf + this->shdr.sh_offset);
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// The first slot of .got.plt points to _DYNAMIC.
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buf[0] = ctx.dynamic ? ctx.dynamic->shdr.sh_addr : 0;
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buf[1] = 0;
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buf[2] = 0;
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for (Symbol<ARM64> *sym : ctx.plt->symbols)
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buf[sym->get_gotplt_idx(ctx)] = ctx.plt->shdr.sh_addr;
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}
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static void write_plt_header(Context<ARM64> &ctx, u8 *buf) {
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// Write PLT header
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static const u8 plt0[] = {
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0xf0, 0x7b, 0xbf, 0xa9, // stp x16, x30, [sp,#-16]!
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0x10, 0x00, 0x00, 0x90, // adrp x16, .got.plt[2]
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0x11, 0x02, 0x40, 0xf9, // ldr x17, [x16, .got.plt[2]]
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0x10, 0x02, 0x00, 0x91, // add x16, x16, .got.plt[2]
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0x20, 0x02, 0x1f, 0xd6, // br x17
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0x1f, 0x20, 0x03, 0xd5, // nop
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0x1f, 0x20, 0x03, 0xd5, // nop
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0x1f, 0x20, 0x03, 0xd5, // nop
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};
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u64 gotplt = ctx.gotplt->shdr.sh_addr + 16;
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u64 plt = ctx.plt->shdr.sh_addr;
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memcpy(buf, plt0, sizeof(plt0));
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write_adr(buf + 4, bits(page(gotplt) - page(plt + 4), 32, 12));
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*(u32 *)(buf + 8) |= bits(gotplt, 11, 3) << 10;
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*(u32 *)(buf + 12) |= ((gotplt) & 0xfff) << 10;
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}
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static void write_plt_entry(Context<ARM64> &ctx, u8 *buf, Symbol<ARM64> &sym) {
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u8 *ent = buf + sym.get_plt_idx(ctx) * ARM64::plt_size;
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static const u8 data[] = {
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0x10, 0x00, 0x00, 0x90, // adrp x16, .got.plt[n]
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0x11, 0x02, 0x40, 0xf9, // ldr x17, [x16, .got.plt[n]]
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0x10, 0x02, 0x00, 0x91, // add x16, x16, .got.plt[n]
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0x20, 0x02, 0x1f, 0xd6, // br x17
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};
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u64 gotplt = sym.get_gotplt_addr(ctx);
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u64 plt = sym.get_plt_addr(ctx);
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memcpy(ent, data, sizeof(data));
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write_adr(ent, bits(page(gotplt) - page(plt), 32, 12));
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*(u32 *)(ent + 4) |= bits(gotplt, 11, 3) << 10;
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*(u32 *)(ent + 8) |= (gotplt & 0xfff) << 10;
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}
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template <>
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void PltSection<ARM64>::copy_buf(Context<ARM64> &ctx) {
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u8 *buf = ctx.buf + this->shdr.sh_offset;
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write_plt_header(ctx, buf);
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for (Symbol<ARM64> *sym : symbols)
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write_plt_entry(ctx, buf, *sym);
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}
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template <>
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void PltGotSection<ARM64>::copy_buf(Context<ARM64> &ctx) {
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u8 *buf = ctx.buf + this->shdr.sh_offset;
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for (Symbol<ARM64> *sym : symbols) {
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u8 *ent = buf + sym->get_pltgot_idx(ctx) * ARM64::pltgot_size;
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static const u8 data[] = {
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0x10, 0x00, 0x00, 0x90, // adrp x16, GOT[n]
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0x11, 0x02, 0x40, 0xf9, // ldr x17, [x16, GOT[n]]
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0x20, 0x02, 0x1f, 0xd6, // br x17
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0x1f, 0x20, 0x03, 0xd5, // nop
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};
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u64 got = sym->get_got_addr(ctx);
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u64 plt = sym->get_plt_addr(ctx);
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memcpy(ent, data, sizeof(data));
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write_adr(ent, bits(page(got) - page(plt), 32, 12));
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*(u32 *)(ent + 4) |= bits(got, 11, 3) << 10;
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}
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}
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template <>
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void EhFrameSection<ARM64>::apply_reloc(Context<ARM64> &ctx,
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ElfRel<ARM64> &rel,
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u64 loc, u64 val) {
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u8 *base = ctx.buf + this->shdr.sh_offset;
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switch (rel.r_type) {
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case R_AARCH64_ABS64:
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*(u64 *)(base + loc) = val;
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return;
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case R_AARCH64_PREL32:
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*(u32 *)(base + loc) = val - this->shdr.sh_addr - loc;
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return;
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case R_AARCH64_PREL64:
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*(u64 *)(base + loc) = val - this->shdr.sh_addr - loc;
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return;
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}
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Fatal(ctx) << "unsupported relocation in .eh_frame: " << rel;
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}
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template <>
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void InputSection<ARM64>::apply_reloc_alloc(Context<ARM64> &ctx, u8 *base) {
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ElfRel<ARM64> *dynrel = nullptr;
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std::span<ElfRel<ARM64>> rels = get_rels(ctx);
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i64 frag_idx = 0;
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if (ctx.reldyn)
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dynrel = (ElfRel<ARM64> *)(ctx.buf + ctx.reldyn->shdr.sh_offset +
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file.reldyn_offset + this->reldyn_offset);
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for (i64 i = 0; i < rels.size(); i++) {
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const ElfRel<ARM64> &rel = rels[i];
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if (rel.r_type == R_AARCH64_NONE)
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continue;
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Symbol<ARM64> &sym = *file.symbols[rel.r_sym];
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u8 *loc = base + rel.r_offset;
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const SectionFragmentRef<ARM64> *ref = nullptr;
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if (rel_fragments && rel_fragments[frag_idx].idx == i)
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ref = &rel_fragments[frag_idx++];
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auto overflow_check = [&](i64 val, i64 lo, i64 hi) {
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if (val < lo || hi <= val)
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Error(ctx) << *this << ": relocation " << rel << " against "
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<< sym << " out of range: " << val << " is not in ["
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<< lo << ", " << hi << ")";
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};
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#define S (ref ? ref->frag->get_addr(ctx) : sym.get_addr(ctx))
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#define A (ref ? ref->addend : rel.r_addend)
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#define P (output_section->shdr.sh_addr + offset + rel.r_offset)
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#define G (sym.get_got_addr(ctx) - ctx.got->shdr.sh_addr)
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#define GOT ctx.got->shdr.sh_addr
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if (needs_dynrel[i]) {
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*dynrel++ = {P, R_AARCH64_ABS64, (u32)sym.get_dynsym_idx(ctx), A};
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*(u64 *)loc = A;
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continue;
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}
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if (needs_baserel[i]) {
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*dynrel++ = {P, R_AARCH64_RELATIVE, 0, (i64)(S + A)};
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*(u64 *)loc = S + A;
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continue;
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}
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switch (rel.r_type) {
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case R_AARCH64_ABS64:
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*(u64 *)loc = S + A;
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continue;
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case R_AARCH64_LDST8_ABS_LO12_NC:
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*(u32 *)loc |= bits(S + A, 11, 0) << 10;
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continue;
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case R_AARCH64_LDST16_ABS_LO12_NC:
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*(u32 *)loc |= bits(S + A, 11, 1) << 10;
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continue;
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case R_AARCH64_LDST32_ABS_LO12_NC:
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*(u32 *)loc |= bits(S + A, 11, 2) << 10;
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continue;
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case R_AARCH64_LDST64_ABS_LO12_NC:
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*(u32 *)loc |= bits(S + A, 11, 3) << 10;
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continue;
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case R_AARCH64_LDST128_ABS_LO12_NC:
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*(u32 *)loc |= bits(S + A, 11, 4) << 10;
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continue;
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case R_AARCH64_ADD_ABS_LO12_NC:
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*(u32 *)loc |= bits(S + A, 11, 0) << 10;
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continue;
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case R_AARCH64_MOVW_UABS_G0_NC:
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*(u32 *)loc |= bits(S + A, 15, 0) << 5;
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continue;
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case R_AARCH64_MOVW_UABS_G1_NC:
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*(u32 *)loc |= bits(S + A, 31, 16) << 5;
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continue;
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case R_AARCH64_MOVW_UABS_G2_NC:
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*(u32 *)loc |= bits(S + A, 47, 32) << 5;
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continue;
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case R_AARCH64_MOVW_UABS_G3:
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*(u32 *)loc |= bits(S + A, 63, 48) << 5;
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continue;
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case R_AARCH64_ADR_GOT_PAGE: {
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i64 val = page(G + GOT + A) - page(P);
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overflow_check(val, -((i64)1 << 32), (i64)1 << 32);
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write_adr(loc, bits(val, 32, 12));
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continue;
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}
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case R_AARCH64_ADR_PREL_PG_HI21: {
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i64 val = page(S + A) - page(P);
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overflow_check(val, -((i64)1 << 32), (i64)1 << 32);
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write_adr(loc, bits(val, 32, 12));
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continue;
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}
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case R_AARCH64_ADR_PREL_LO21: {
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i64 val = S + A - P;
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overflow_check(val, -((i64)1 << 20), (i64)1 << 20);
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write_adr(loc, val);
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continue;
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}
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case R_AARCH64_CALL26:
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case R_AARCH64_JUMP26:
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if (!sym.esym().is_undef_weak()) {
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i64 val = S + A - P;
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overflow_check(val, -((i64)1 << 26), (i64)1 << 26);
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*(u32 *)loc |= (val >> 2) & 0x3ffffff;
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} else {
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// On ARM, calling an weak undefined symbol jumps to the
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// next instruction.
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*(u32 *)loc |= 1;
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}
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continue;
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case R_AARCH64_CONDBR19: {
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i64 val = S + A - P;
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overflow_check(val, -((i64)1 << 20), (i64)1 << 20);
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*(u32 *)loc |= bits(val, 20, 2) << 5;
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continue;
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}
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case R_AARCH64_PREL16: {
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i64 val = S + A - P;
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overflow_check(val, -((i64)1 << 15), (i64)1 << 15);
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*(u16 *)loc = val;
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continue;
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}
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case R_AARCH64_PREL32: {
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i64 val = S + A - P;
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overflow_check(val, -((i64)1 << 31), (i64)1 << 32);
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*(u32 *)loc = val;
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continue;
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}
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case R_AARCH64_PREL64:
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*(u64 *)loc = S + A - P;
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continue;
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case R_AARCH64_LD64_GOT_LO12_NC:
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*(u32 *)loc |= bits(G + GOT + A, 11, 3) << 10;
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continue;
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case R_AARCH64_LD64_GOTPAGE_LO15: {
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i64 val = G + GOT + A - page(GOT);
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overflow_check(val, 0, 1 << 15);
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*(u32 *)loc |= bits(val, 14, 3) << 10;
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continue;
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}
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case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21: {
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i64 val = page(sym.get_gottp_addr(ctx) + A) - page(P);
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overflow_check(val, -((i64)1 << 32), (i64)1 << 32);
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write_adr(loc, bits(val, 32, 12));
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continue;
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}
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case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
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*(u32 *)loc |= bits(sym.get_gottp_addr(ctx) + A, 11, 3) << 10;
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continue;
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case R_AARCH64_TLSLE_ADD_TPREL_HI12: {
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i64 val = S + A - ctx.tls_begin + 16;
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overflow_check(val, 0, (i64)1 << 24);
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*(u32 *)loc |= bits(val, 23, 12) << 10;
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continue;
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}
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case R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
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*(u32 *)loc |= bits(S + A - ctx.tls_begin + 16, 11, 0) << 10;
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continue;
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case R_AARCH64_TLSGD_ADR_PAGE21: {
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i64 val = page(sym.get_tlsgd_addr(ctx) + A) - page(P);
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overflow_check(val, -((i64)1 << 32), (i64)1 << 32);
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write_adr(loc, bits(val, 32, 12));
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continue;
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}
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case R_AARCH64_TLSGD_ADD_LO12_NC:
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*(u32 *)loc |= bits(sym.get_tlsgd_addr(ctx) + A, 11, 0) << 10;
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continue;
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case R_AARCH64_TLSDESC_ADR_PAGE21: {
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if (ctx.relax_tlsdesc && !sym.is_imported) {
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// adrp x0, 0 -> movz x0, #tls_ofset_hi, lsl #16
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i64 val = (S + A - ctx.tls_begin + 16);
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overflow_check(val, -((i64)1 << 32), (i64)1 << 32);
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*(u32 *)loc = 0xd2a00000 | (bits(val, 32, 16) << 5);
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} else {
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i64 val = page(sym.get_tlsdesc_addr(ctx) + A) - page(P);
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overflow_check(val, -((i64)1 << 32), (i64)1 << 32);
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write_adr(loc, bits(val, 32, 12));
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}
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continue;
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}
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case R_AARCH64_TLSDESC_LD64_LO12:
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if (ctx.relax_tlsdesc && !sym.is_imported) {
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// ldr x2, [x0] -> movk x0, #tls_ofset_lo
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u32 offset_lo = (S + A - ctx.tls_begin + 16) & 0xffff;
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*(u32 *)loc = 0xf2800000 | (offset_lo << 5);
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} else {
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*(u32 *)loc |= bits(sym.get_tlsdesc_addr(ctx) + A, 11, 3) << 10;
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}
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continue;
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case R_AARCH64_TLSDESC_ADD_LO12:
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if (ctx.relax_tlsdesc && !sym.is_imported) {
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// add x0, x0, #0 -> nop
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*(u32 *)loc = 0xd503201f;
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} else {
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*(u32 *)loc |= bits(sym.get_tlsdesc_addr(ctx) + A, 11, 0) << 10;
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}
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continue;
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case R_AARCH64_TLSDESC_CALL:
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if (ctx.relax_tlsdesc && !sym.is_imported) {
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// blr x2 -> nop
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*(u32 *)loc = 0xd503201f;
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}
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continue;
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default:
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unreachable();
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}
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#undef S
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#undef A
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#undef P
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#undef G
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#undef GOT
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}
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}
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template <>
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void InputSection<ARM64>::apply_reloc_nonalloc(Context<ARM64> &ctx, u8 *base) {
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std::span<ElfRel<ARM64>> rels = get_rels(ctx);
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i64 frag_idx = 0;
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for (i64 i = 0; i < rels.size(); i++) {
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const ElfRel<ARM64> &rel = rels[i];
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if (rel.r_type == R_AARCH64_NONE)
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continue;
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Symbol<ARM64> &sym = *file.symbols[rel.r_sym];
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u8 *loc = base + rel.r_offset;
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if (!sym.file) {
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report_undef(ctx, sym);
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continue;
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}
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const SectionFragmentRef<ARM64> *ref = nullptr;
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if (rel_fragments && rel_fragments[frag_idx].idx == i)
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ref = &rel_fragments[frag_idx++];
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#define S (ref ? ref->frag->get_addr(ctx) : sym.get_addr(ctx))
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#define A (ref ? ref->addend : rel.r_addend)
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#define P (output_section->shdr.sh_addr + offset + rel.r_offset)
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#define G (sym.get_got_addr(ctx) - ctx.got->shdr.sh_addr)
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#define GOT ctx.got->shdr.sh_addr
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switch (rel.r_type) {
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case R_AARCH64_ABS64:
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*(u64 *)loc = S + A;
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continue;
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case R_AARCH64_ABS32:
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*(u32 *)loc = S + A;
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continue;
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default:
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Fatal(ctx) << *this << ": invalid relocation for non-allocated sections: "
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<< rel;
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break;
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}
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#undef S
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#undef A
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#undef P
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#undef G
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#undef GOT
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}
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}
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template <>
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void InputSection<ARM64>::scan_relocations(Context<ARM64> &ctx) {
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assert(shdr.sh_flags & SHF_ALLOC);
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this->reldyn_offset = file.num_dynrel * sizeof(ElfRel<ARM64>);
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std::span<ElfRel<ARM64>> rels = get_rels(ctx);
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bool is_writable = (shdr.sh_flags & SHF_WRITE);
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// Scan relocations
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for (i64 i = 0; i < rels.size(); i++) {
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const ElfRel<ARM64> &rel = rels[i];
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if (rel.r_type == R_AARCH64_NONE)
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continue;
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Symbol<ARM64> &sym = *file.symbols[rel.r_sym];
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u8 *loc = (u8 *)(contents.data() + rel.r_offset);
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if (!sym.file) {
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report_undef(ctx, sym);
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continue;
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}
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if (sym.get_type() == STT_GNU_IFUNC) {
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sym.flags |= NEEDS_GOT;
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sym.flags |= NEEDS_PLT;
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}
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switch (rel.r_type) {
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case R_AARCH64_ABS64: {
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Action table[][4] = {
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// Absolute Local Imported data Imported code
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{ NONE, BASEREL, DYNREL, DYNREL }, // DSO
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{ NONE, BASEREL, DYNREL, DYNREL }, // PIE
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{ NONE, NONE, COPYREL, PLT }, // PDE
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};
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dispatch(ctx, table, i, rel, sym);
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break;
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}
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case R_AARCH64_ADR_GOT_PAGE:
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case R_AARCH64_LD64_GOT_LO12_NC:
|
|
case R_AARCH64_LD64_GOTPAGE_LO15:
|
|
sym.flags |= NEEDS_GOT;
|
|
break;
|
|
case R_AARCH64_CALL26:
|
|
case R_AARCH64_JUMP26:
|
|
if (sym.is_imported)
|
|
sym.flags |= NEEDS_PLT;
|
|
break;
|
|
case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
|
|
case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
|
|
sym.flags |= NEEDS_GOTTP;
|
|
break;
|
|
case R_AARCH64_ADR_PREL_PG_HI21: {
|
|
Action table[][4] = {
|
|
// Absolute Local Imported data Imported code
|
|
{ NONE, NONE, ERROR, ERROR }, // DSO
|
|
{ NONE, NONE, ERROR, PLT }, // PIE
|
|
{ NONE, NONE, COPYREL, PLT }, // PDE
|
|
};
|
|
dispatch(ctx, table, i, rel, sym);
|
|
break;
|
|
}
|
|
case R_AARCH64_TLSGD_ADR_PAGE21:
|
|
sym.flags |= NEEDS_TLSGD;
|
|
break;
|
|
case R_AARCH64_TLSDESC_ADR_PAGE21:
|
|
case R_AARCH64_TLSDESC_LD64_LO12:
|
|
case R_AARCH64_TLSDESC_ADD_LO12:
|
|
if (!ctx.relax_tlsdesc || sym.is_imported)
|
|
sym.flags |= NEEDS_TLSDESC;
|
|
break;
|
|
case R_AARCH64_ADD_ABS_LO12_NC:
|
|
case R_AARCH64_ADR_PREL_LO21:
|
|
case R_AARCH64_CONDBR19:
|
|
case R_AARCH64_LDST16_ABS_LO12_NC:
|
|
case R_AARCH64_LDST32_ABS_LO12_NC:
|
|
case R_AARCH64_LDST64_ABS_LO12_NC:
|
|
case R_AARCH64_LDST128_ABS_LO12_NC:
|
|
case R_AARCH64_LDST8_ABS_LO12_NC:
|
|
case R_AARCH64_MOVW_UABS_G0_NC:
|
|
case R_AARCH64_MOVW_UABS_G1_NC:
|
|
case R_AARCH64_MOVW_UABS_G2_NC:
|
|
case R_AARCH64_MOVW_UABS_G3:
|
|
case R_AARCH64_PREL16:
|
|
case R_AARCH64_PREL32:
|
|
case R_AARCH64_PREL64:
|
|
case R_AARCH64_TLSLE_ADD_TPREL_HI12:
|
|
case R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
|
|
case R_AARCH64_TLSGD_ADD_LO12_NC:
|
|
case R_AARCH64_TLSDESC_CALL:
|
|
break;
|
|
default:
|
|
Error(ctx) << *this << ": unknown relocation: " << rel;
|
|
}
|
|
}
|
|
}
|
|
|
|
} // namespace mold::elf
|