added jit compiler images
14
026_llvm.md
@ -41,14 +41,14 @@ was first developed for the Intel 8086 CPU family. The base types which hardware
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operates over are integers and floating point types. Let us just consider the
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operates over are integers and floating point types. Let us just consider the
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integral types for now, these come in four major varieties:
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integral types for now, these come in four major varieties:
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<img src="/images/bits.png"></img>
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![](img/bits.png)
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On the Intel architecture numbers are represented *little endian* meaning lower
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On the Intel architecture numbers are represented *little endian* meaning lower
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significant bytes are stored in lower memory addresses. The whole memory
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significant bytes are stored in lower memory addresses. The whole memory
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representation for a value is partitioned into *high bits* and *low bits*. For
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representation for a value is partitioned into *high bits* and *low bits*. For
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example the hexadecimal number ``0xc0ffee`` as a DWORD is stored in memory as:
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example the hexadecimal number ``0xc0ffee`` as a DWORD is stored in memory as:
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<img src="/images/coffee.png"></img>
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![](img/coffee.png)
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In Haskell unboxed integral machine types are provided by the ``Data.Word``
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In Haskell unboxed integral machine types are provided by the ``Data.Word``
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[module](https://hackage.haskell.org/package/base-4.8.1.0/docs/Data-Word.html).
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[module](https://hackage.haskell.org/package/base-4.8.1.0/docs/Data-Word.html).
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@ -109,7 +109,7 @@ Each of these registers can be addressed as a smaller register containing a
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subset of the lower bits. The 32-bit register of ``rax`` is ``eax``. These are
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subset of the lower bits. The 32-bit register of ``rax`` is ``eax``. These are
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shown in the table below.
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shown in the table below.
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<img src="/images/registers.png"></img>
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![](img/registers.png)
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These smaller registers are given specific names with modified prefixes.
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These smaller registers are given specific names with modified prefixes.
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@ -614,7 +614,7 @@ prefix opcode data assembly meaning
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Ok, let's look at the full structure of an instruction. It consists of several
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Ok, let's look at the full structure of an instruction. It consists of several
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parts.
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parts.
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<img src="/images/opcode.png" width=100%></img>
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![](img/opcode.png)
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<!--
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<!--
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- Prefix
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- Prefix
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@ -648,7 +648,7 @@ Prefix Opcode Mod R/M Scale Index Base Displacement Immediate
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**Prefix**
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**Prefix**
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<img src="/images/Prefix.png"></img>
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![](img/Prefix.png)
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The header fixes the first four bits to be constant ``0b0100`` while the next
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The header fixes the first four bits to be constant ``0b0100`` while the next
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four bits indicate the pretense of W/R/X/B extensions.
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four bits indicate the pretense of W/R/X/B extensions.
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@ -673,7 +673,7 @@ The W bit modifies the operation width. The R, X and B fields extend the registe
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**ModR/M byte**
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**ModR/M byte**
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<img src="/images/ModRM.png"></img>
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![](img/ModRM.png)
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The Mod-Reg-R/M byte determines the instruction's operands and the addressing
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The Mod-Reg-R/M byte determines the instruction's operands and the addressing
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modes. These are several variants of addressing modes.
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modes. These are several variants of addressing modes.
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@ -744,7 +744,7 @@ ModRM = 0b11000011
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ModRM = 0xc3
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ModRM = 0xc3
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```
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```
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<img src="/images/ModRM_example.png"></img>
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![](img/ModRM_example.png)
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<hr/>
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<hr/>
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BIN
img/ModRM.png
Normal file
After Width: | Height: | Size: 2.1 KiB |
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img/ModRM_example.png
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After Width: | Height: | Size: 3.4 KiB |
BIN
img/Prefix.png
Normal file
After Width: | Height: | Size: 4.1 KiB |
BIN
img/Scale.png
Normal file
After Width: | Height: | Size: 2.3 KiB |
BIN
img/bits.png
Normal file
After Width: | Height: | Size: 9.9 KiB |
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img/coffee.png
Normal file
After Width: | Height: | Size: 3.3 KiB |
BIN
img/opcode.png
Normal file
After Width: | Height: | Size: 23 KiB |
BIN
img/registers.png
Normal file
After Width: | Height: | Size: 3.1 KiB |