unleashed-firmware/firmware/targets/f7/furi_hal/furi_hal_clock.h
あく 338fc3afea
New clock switch schema, fixes random core2 crashes (#3008)
* Updated stack to 1.17.0

* hal: ble: Fixed stack config

* Bumped stack version in config

* scripts: added validation of copro stack version in update bundles

* Copro: update to 1.17.2

* FuriHal: adjust tick frequency for HSE as sys clk

* FuriHal: adjust systick reload on sys clock change

* Sync api and format sources

* scripts: updated ob.data for newer stack

* FuriHal: return core2 hse pll transition on deep sleep

* FuriHal: cleanup ble glue

* FuriHal: rework ble glue, allow shci_send in critical section

* FuriHal: sync api symbols

* FuriHal: cleanup BLE glue, remove unused garbage and duplicate declarations

* FuriHal: BLE glue cleanup, 2nd iteration

* FuriHal: hide tick drift reports under FURI_HAL_OS_DEBUG

* Lib: sync stm32wb_copro with latest dev

* FuriHal: ble-glue, slightly less editable device name and duplicate definition cleanup

* FuriHal: update ble config options, enable some optimizations and ext adv

* FuriHal: update clock switch method documentation

* FuriHal: better SNBRSA bug workaround fix

* FuriHal: complete comment about tick skew

* FuriHal: proper condition in clock hsi2hse transition

* FuriHal: move PLL start to hse2pll routine, fix lockup caused by core2 switching to HSE before us

* FuriHal: explicit HSE start before switch

* FuriHal: fix documentation and move flash latency change to later stage, remove duplicate LL_RCC_SetRFWKPClockSource call

---------

Co-authored-by: hedger <hedger@nanode.su>
Co-authored-by: hedger <hedger@users.noreply.github.com>
2023-09-19 18:22:21 +04:00

81 lines
1.9 KiB
C

#pragma once
#include <stm32wbxx_ll_rcc.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
FuriHalClockMcoLse,
FuriHalClockMcoSysclk,
FuriHalClockMcoMsi100k,
FuriHalClockMcoMsi200k,
FuriHalClockMcoMsi400k,
FuriHalClockMcoMsi800k,
FuriHalClockMcoMsi1m,
FuriHalClockMcoMsi2m,
FuriHalClockMcoMsi4m,
FuriHalClockMcoMsi8m,
FuriHalClockMcoMsi16m,
FuriHalClockMcoMsi24m,
FuriHalClockMcoMsi32m,
FuriHalClockMcoMsi48m,
} FuriHalClockMcoSourceId;
typedef enum {
FuriHalClockMcoDiv1 = LL_RCC_MCO1_DIV_1,
FuriHalClockMcoDiv2 = LL_RCC_MCO1_DIV_2,
FuriHalClockMcoDiv4 = LL_RCC_MCO1_DIV_4,
FuriHalClockMcoDiv8 = LL_RCC_MCO1_DIV_8,
FuriHalClockMcoDiv16 = LL_RCC_MCO1_DIV_16,
} FuriHalClockMcoDivisorId;
/** Early initialization */
void furi_hal_clock_init_early();
/** Early deinitialization */
void furi_hal_clock_deinit_early();
/** Initialize clocks */
void furi_hal_clock_init();
/** Switch clock from HSE to HSI */
void furi_hal_clock_switch_hse2hsi();
/** Switch clock from HSI to HSE */
void furi_hal_clock_switch_hsi2hse();
/** Switch clock from HSE to PLL
*
* @return true if changed, false if failed or not possible at this moment
*/
bool furi_hal_clock_switch_hse2pll();
/** Switch clock from PLL to HSE
*
* @return true if changed, false if failed or not possible at this moment
*/
bool furi_hal_clock_switch_pll2hse();
/** Stop SysTick counter without resetting */
void furi_hal_clock_suspend_tick();
/** Continue SysTick counter operation */
void furi_hal_clock_resume_tick();
/** Enable clock output on MCO pin
*
* @param source MCO clock source
* @param div MCO clock division
*/
void furi_hal_clock_mco_enable(FuriHalClockMcoSourceId source, FuriHalClockMcoDivisorId div);
/** Disable clock output on MCO pin */
void furi_hal_clock_mco_disable();
#ifdef __cplusplus
}
#endif