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[arm] Added documentation for ARMReg constructors.
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@ -40,7 +40,7 @@ import qualified SemMC.Architecture.AArch32 as ARM
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import qualified SemMC.Architecture.ARM.Location as Loc
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import qualified Text.PrettyPrint.HughesPJClass as PP
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-- | Defines the Register set for the ARM processor.
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data ARMReg tp where
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-- n.b. The Thumb (T32) register model is the same as the ARM
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-- (A32) model, so just use the latter to define registers.
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@ -48,7 +48,29 @@ data ARMReg tp where
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-- GPR15 is normally aliased with the PC, but not always,
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-- so track it separately and use semantics definitions
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-- to manage the synchronization.
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-- | The Program Counter (often referred to by Macaw as the "IP"
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-- or Instruction Pointer, but ARM documentation refers to this as
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-- the PC).
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--
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-- Note that this is generally also GPR15, but there are
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-- oddities in the definition (see "Writing to the PC" in E.1.2.3,
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-- pg E1-2295, and particularly the note at the top of that page:
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-- "The A32 instruction set provides more general access to the
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-- PC, and many A32 instructions can use the PC as a
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-- general-purpose register. However, ARM deprecates the use of
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-- PC for any purpose other than as the program counter."
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--
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-- Due to this ambiguity, the PC is currently modelled as separate
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-- and distinct from GPR15 in Macaw. The SemMC semantics also
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-- make a distinction between GPR15 and PC and the semantics often
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-- simply update the latter (based on the ARM documentation),
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-- ignoring the former.
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ARM_PC :: (w ~ MC.RegAddrWidth ARMReg, 1 <= w) => ARMReg (BVType w)
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-- | The CPSR is the Current Processor Status Register, which is
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-- the current value of the Application Program Status Register
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-- (E1.2.4, page E1-2297).
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ARM_CPSR :: (w ~ MC.RegAddrWidth ARMReg, 1 <= w) => ARMReg (BVType w)
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-- | GPR14 is the link register for ARM
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