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Use defined functions to generate TH for ARM

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This commit is contained in:
Luke Maurer 2018-06-26 11:04:29 -07:00
parent fbdae275cb
commit d3c40eb308
3 changed files with 5 additions and 3 deletions
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3
macaw-arm/src/Data/Macaw/ARM/Semantics/ARMSemantics.hs
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@ -21,7 +21,7 @@ import qualified Data.Macaw.Types as MT
import Data.Proxy ( Proxy(..) ) import Data.Proxy ( Proxy(..) )
import Dismantle.ARM -- must be present to supply definitions for genExecInstruction output import Dismantle.ARM -- must be present to supply definitions for genExecInstruction output
import qualified SemMC.Architecture.AArch32 as ARMSem import qualified SemMC.Architecture.AArch32 as ARMSem
import SemMC.Architecture.ARM.Opcodes ( allA32Semantics, allA32OpcodeInfo ) import SemMC.Architecture.ARM.Opcodes ( allA32Semantics, allA32OpcodeInfo, a32DefinedFunctions )
execInstruction :: MC.Value ARMSem.AArch32 ids (MT.BVType 32) execInstruction :: MC.Value ARMSem.AArch32 ids (MT.BVType 32)
@ -34,5 +34,6 @@ execInstruction = $(genExecInstructionLogStdErr (Proxy @ARMSem.AArch32)
'a32InstructionMatcher 'a32InstructionMatcher
allA32Semantics allA32Semantics
allA32OpcodeInfo allA32OpcodeInfo
a32DefinedFunctions
([t| Dismantle.ARM.Operand |], [t| ARMSem.AArch32 |]) ([t| Dismantle.ARM.Operand |], [t| ARMSem.AArch32 |])
) )

2
macaw-arm/src/Data/Macaw/ARM/Semantics/TH.hs
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@ -62,7 +62,7 @@ armNonceAppEval bvi nonceApp =
S.FnApp symFn args -> S.FnApp symFn args ->
let nm = symFnName symFn let nm = symFnName symFn
in case nm of in case nm of
"arm_is_r15" -> return $ "uf_arm_is_r15" -> return $
-- This requires special handling because this can -- This requires special handling because this can
-- be checking actual GPR locations or the results -- be checking actual GPR locations or the results
-- of an expression extracting a register number -- of an expression extracting a register number

3
macaw-arm/src/Data/Macaw/ARM/Semantics/ThumbSemantics.hs
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@ -21,7 +21,7 @@ import qualified Data.Macaw.Types as MT
import Data.Proxy ( Proxy(..) ) import Data.Proxy ( Proxy(..) )
import Dismantle.Thumb -- as ThumbDis -- must be present to supply definitions for genExecInstruction output import Dismantle.Thumb -- as ThumbDis -- must be present to supply definitions for genExecInstruction output
import qualified SemMC.Architecture.AArch32 as ARMSem import qualified SemMC.Architecture.AArch32 as ARMSem
import SemMC.Architecture.ARM.Opcodes ( allT32Semantics, allT32OpcodeInfo ) import SemMC.Architecture.ARM.Opcodes ( allT32Semantics, allT32OpcodeInfo, t32DefinedFunctions )
execInstruction :: MC.Value ARMSem.AArch32 ids (MT.BVType 32) execInstruction :: MC.Value ARMSem.AArch32 ids (MT.BVType 32)
@ -34,5 +34,6 @@ execInstruction = $(genExecInstructionLogStdErr (Proxy @ARMSem.AArch32)
't32InstructionMatcher 't32InstructionMatcher
allT32Semantics allT32Semantics
allT32OpcodeInfo allT32OpcodeInfo
t32DefinedFunctions
([t| Dismantle.Thumb.Operand |], [t| ARMSem.AArch32 |]) ([t| Dismantle.Thumb.Operand |], [t| ARMSem.AArch32 |])
) )