mirror of
https://github.com/InfiniTimeOrg/InfiniTime.git
synced 2024-12-25 10:41:42 +03:00
87 lines
2.5 KiB
Markdown
87 lines
2.5 KiB
Markdown
# Flashing the firmware with JLink
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Start JLinkExe:
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```
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$ /opt/SEGGER/JLink/JLinkExe -device nrf52 -if swd -speed 4000 -autoconnect 1
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SEGGER J-Link Commander V6.70d (Compiled Apr 16 2020 17:59:37)
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DLL version V6.70d, compiled Apr 16 2020 17:59:25
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Connecting to J-Link via USB...O.K.
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Firmware: J-Link OB-SAM3U128-V2-NordicSemi compiled Mar 17 2020 14:43:00
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Hardware version: V1.00
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S/N: 682579153
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License(s): RDI, FlashBP, FlashDL, JFlash, GDB
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VTref=3.300V
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Device "NRF52" selected.
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Connecting to target via SWD
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InitTarget() start
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InitTarget() end
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Found SW-DP with ID 0x2BA01477
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DPIDR: 0x2BA01477
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Scanning AP map to find all available APs
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AP[2]: Stopped AP scan as end of AP map has been reached
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AP[0]: AHB-AP (IDR: 0x24770011)
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AP[1]: JTAG-AP (IDR: 0x02880000)
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Iterating through AP map to find AHB-AP to use
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AP[0]: Core found
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AP[0]: AHB-AP ROM base: 0xE00FF000
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CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
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Found Cortex-M4 r0p1, Little endian.
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FPUnit: 6 code (BP) slots and 2 literal slots
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CoreSight components:
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ROMTbl[0] @ E00FF000
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ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7
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ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 003BB002 DWT
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ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 002BB003 FPB
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ROMTbl[0][3]: E0000000, CID: B105E00D, PID: 003BB001 ITM
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ROMTbl[0][4]: E0040000, CID: B105900D, PID: 000BB9A1 TPIU
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ROMTbl[0][5]: E0041000, CID: B105900D, PID: 000BB925 ETM
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Cortex-M4 identified.
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J-Link>
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```
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Use the command loadfile to program the .hex file:
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```
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J-Link>loadfile pinetime-app.hex
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Downloading file [pinetime-app.hex]...
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Comparing flash [100%] Done.
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Erasing flash [100%] Done.
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Programming flash [100%] Done.
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Verifying flash [100%] Done.
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J-Link: Flash download: Bank 0 @ 0x00000000: 1 range affected (4096 bytes)
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J-Link: Flash download: Total time needed: 0.322s (Prepare: 0.043s, Compare: 0.202s, Erase: 0.003s, Program: 0.064s, Verify: 0.000s, Restore: 0.007s)
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O.K.
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```
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Then reset (r) and start (g) the CPU:
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```
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J-Link>r
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Reset delay: 0 ms
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Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
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Reset: Halt core after reset via DEMCR.VC_CORERESET.
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Reset: Reset device via AIRCR.SYSRESETREQ.
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J-Link>g
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```
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# JLink RTT
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RTT is a feature from Segger's JLink devices that allows bidirectional communication between the debugger and the target. This feature can be used to get the logs from the embedded software on the development computer.
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- Program the MCU with the code (see above)
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- Start JLinkExe
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```
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$ JLinkExe -device nrf52 -if swd -speed 4000 -autoconnect 1
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```
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Start JLinkRTTClient
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```
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$ JLinkRTTClient
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```
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