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Kernel: Add MIDR_EL1, Main ID Register
This register is already provided in a separate class but will be migrated here for uniform access
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sideshowbarker
2024-07-19 17:00:50 +09:00
Author: https://github.com/konradekk Commit: https://github.com/SerenityOS/serenity/commit/e7d4bbcde87 Pull-request: https://github.com/SerenityOS/serenity/pull/16647 Reviewed-by: https://github.com/nico ✅
@ -311,6 +311,28 @@ struct alignas(u64) SCTLR_EL1 {
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};
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static_assert(sizeof(SCTLR_EL1) == 8);
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// https://developer.arm.com/documentation/ddi0601/2022-09/AArch64-Registers/MIDR-EL1--Main-ID-Register?lang=en
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// MIDR_EL1, Main ID Register
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struct alignas(u64) MIDR_EL1 {
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int Revision : 4;
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int PartNum : 12;
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int Architecture : 4;
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int Variant : 4;
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int Implementer : 8;
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int : 32;
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static inline MIDR_EL1 read()
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{
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MIDR_EL1 affinity_register;
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asm("mrs %[value], MIDR_EL1"
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: [value] "=r"(affinity_register));
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return affinity_register;
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}
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};
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static_assert(sizeof(MIDR_EL1) == 8);
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// https://developer.arm.com/documentation/ddi0595/2021-06/AArch64-Registers/HCR-EL2--Hypervisor-Configuration-Register
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// Hypervisor Configuration Register
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struct alignas(u64) HCR_EL2 {
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